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TMS320C6748: McBSP Loopback

Part Number: TMS320C6748

Hi,

Can anyone help me out with the register settings that we need to set for the McBSP loopback mode. What is the procedure ?

Thank you in advance for any help you can provide.

  • Hi,

    We're looking into this.

    Best REgards,
    Yordan
  • Hi,

    See section 24.2.5.3.5 Digital Loopback Mode: DLB from the device TRM.

    First you must ensure that the McBSP is NOT in clock stop mode (CLKSTP = 2h or 3h in the serial port control register (SPCR)). Then you can set DLB = 0x1 in SPCR to enable digital loopback mode.

    Best Regards,
    Yordan
  • Thank You Yordan Kovachev,
    I am trying to do the digital loop back using DMA by enabling the FIFO. But the change in FIFO registers through program is not updated in the C6748 registers ? what could be the issue ?
  • Harikrishna,

    The MCBSP LLD update for C674x is now available  on the external GIT location here:

    Please note that this will be integrated by default into the PRSDK release at the end of 2Q2018.

    Instructions to pull in the update:

    cd <PDK_INSTALL_PATH>/packages/ti/drv
    git clone git://git.ti.com/keystone-rtos/mcbsp-lld.git mcbsp
    cd mcbsp
    
    //Setup PDK Build environment before you proceed

    cd <PDK_INSTALL_PATH>\packages\ti\drv\mcbsp xdc clean xdc release make all

    This should build the package and the mcbsp driver libraries. If you need to generate the example project for digital loopback, you can follow these additonal instructions:

    cd <PDK_INSTALL_PATH>\packages
    pdkProjectCreate.bat OMAPL138 all little mcbsp all dsp

    Let us know if you are having any issues.

    Regards,

    Rahul

  • Hi Rahul,

    I am having a doubt regarding the internal FIFO in McBSP. Can we read the FIFO's through memory ? Is it possible to work with FIFO's without the help of EDMA ? 

  • Hari,

    MCBSP FIFO data can be read directly by the CPU if required. The MCBSP FIFO data address is provided in the Data Manual. It is the 4K region starting at 0x01F10000.

    Regards,
    Rahul
  • Thank you Rahul,

    Thanks for the reply.

    Now I am trying to set the RNUMEVT and RNUMDMA in the RFIFOCTL registers as 0x04 and 0x01 respectively. i.e, I need the DMA event when there are at least 4 number of 32bit words in the RXFIFO. The event should trigger a transfer of a 32bit word to a variable. But, I am only getting the first word transferred when I try the above settings. My FIFO is having 64 words at the beginning and after the transfer there are 63 words remaining. Can you please help me out with this issue ?