RE: Compiler/AM5728: IPC Memory setup

Hi Rob,

When using IPC, you can modify the memory map using a config.bld file as shown in the snippet below. You will need to change your platform to ti.platforms.evmDRA7XX:dsp1 to support this.

var SR_0 = {
    name: "SR_0", space: "data", access: "RW",
    base: 0x8E000000, len: 0x1000000,
    comment: "SR#0 Memory (16 MB)"
};

Build.platformTable["ti.platforms.evmDRA7XX:dsp1"] = {
    externalMemoryMap: [
        [ "DSP1_PROG", {
            name: "DSP1_PROG", space: "code/data", access: "RWX",
            base: 0x8C000000, len: 0x1000000,
            comment: "DSP1 Program Memory (16 MB)"
        }],
        [ "SR_0", SR_0 ]
    ],
    codeMemory:  "DSP1_PROG",
    dataMemory:  "DSP1_PROG",
    stackMemory: "DSP1_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};

Build.platformTable["ti.platforms.evmDRA7XX:dsp2"] = {
    externalMemoryMap: [
        [ "DSP2_PROG", {
            name: "DSP2_PROG", space: "code/data", access: "RWX",
            base: 0x8D000000, len: 0x1000000,
            comment: "DSP2 Program Memory (16 MB)"
        }],
        [ "SR_0", SR_0 ]
    ],
    codeMemory:  "DSP2_PROG",
    dataMemory:  "DSP2_PROG",
    stackMemory: "DSP2_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};

SharedRegion 0 (SR_0) is required by for IPC_Start. I recommend using our messageQ example as a reference, it can be found at ipc\examples\DRA7XX_bios_elf\ex02_messageq. Our IPC examples are makefile based, but I can walk you through porting them to CCS if needed. 

Let us know if you are using or planning on using IPC between the ARM running Linux and DSPs running RTOS (SYS/BIOS), as this will require some additional steps. 

Thanks very much.

1.  I assume I will need to make a ti.platforms.evmDRA7XX:dsp2 as well?  I assume I would allocate the same 0x8e000000 base address for the SR_0 and allocate a the DSP2_PROG space to say 0x8d000000 ?

2.  How did you know (documentation wise) that IPC requires this shared region?  I mean I looked in the code and saw a call to sharedregion implying a shared region was needed, but if I use another module, how would I know to create an appropriate section or is this the ONLY module that requires its own shared section?, how would I know to call it SR_0?  since this is needed memory and is attached to your IPC code.

I couldn't see anything in the example that brings out what you showed here creating the shared section.

I'm looking at your sys/bios or spruex3t.pdf and found only one mention of a .bld file.  I also googled it and get a link to: 

how do I specify to use this particular config.bld file in code composer?

Is their any logic behind your base address selection relative to SYS/BIOS, ie: is there anything specific tied to your selection of 0x8c000000 for example for DSP1?

Yes I will need to use IPC between ARM and DSP with ARM running Linux and DSP running SYS/BIOS.

Thanks.