Part Number: PROCESSOR-SDK-AM335X
I'm looking at an issue with the BBB in a system which is being tested against resilience to fast transients.
At the hardware level I see the processor release control of the DP and DN lines and at the software level (Linux, recent build) I see a device disconnect. I see this with various different devices, FULL SPEED and LOW SPEED plugged into the BBB HOST PORT. I also see "invalid OTG device" messages (strange as this port can only be a HOST due to USB1_ID being tied low.
Using a high speed multichannel scope and taking noise precautions I have been able to record the timing of the transients and verify SE0 events on the line, however none of these meet the USB 2.0 FULL/LOW SPEED specification timing of SE0> 2us<2ms (see USB 20.pdf spec para 7.1.7.3 available from USB org for details).
I see an apparent response to a disconnect to unstable 200ns signals.
My question is this : Where is the 2us SE0 timer implemented in the AM333X - is it supposed to be in software in response to the disconnect interrupt, or is this in the PHY (possibly with a settable timer). I've not been able to locate this information myself so I would appreciate any help.
This might also be a HIGH SPEED disconnect signal (which shouldn't be enabled as we have only a Low or Full speed device attached) where the differential voltage is sampled instead.
thanks for any pointers
rgds
Ian