Other Parts Discussed in Thread: TUSB1210
Tool/software: Linux
Hi,
I'm using DRA74x chip and Linux version 3.14.57,I am here to configure the TUSB1210 chip, it can work normally, but the USB1 port into the mouse system will hang dead, USB4 port will not hang.I would like to ask you how to configure the TUSB1210 in the device tree. Here is my configuration.the gpio5_17 is a reset pin of tusb1210 and timer5 nod is clock source to provide frequency 19.2MHz to TUSB1210.
&omap_dwc3_4 {
status = "okay";
extcon = <&extcon_usb4>;
};
& timer5 {
clocks = <&timer5_gfclk_mux>;
clock-names = "timer_ext_ck";
};
& usb4 {
dr_mode = "otg";
snps,hsphy_interface = "ulpi";
reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
timer = <&timer5>;
clocks = <&dpll_pcie_ref_ck>, <&dpll_pcie_ref_m2_ck>, <&pcie2_dclk_div>, <&clkoutmux0_clk_mux>, <&timer5_gfclk_mux>;
clock-names = "pcie_ref", "pcie_ref_m2", "pcie2", "clkout0", "timer5";
};
bellow was the code of option at core.c:
static int dwc3_phy_setup(struct dwc3 *dwc)
{
u32 reg;
int ret = 0;
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
/*
* Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY
* to '0' during coreConsultant configuration. So default value
* will be '0' when the core is reset. Application needs to set it
* to '1' after the core initialization is completed.
*/
if (dwc->revision > DWC3_REVISION_194A)
reg |= DWC3_GUSB3PIPECTL_SUSPHY;
if (dwc->u2ss_inp3_quirk)
reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK;
if (dwc->req_p1p2p3_quirk)
reg |= DWC3_GUSB3PIPECTL_REQP1P2P3;
if (dwc->del_p1p2p3_quirk)
reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN;
if (dwc->del_phy_power_chg_quirk)
reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE;
if (dwc->lfps_filter_quirk)
reg |= DWC3_GUSB3PIPECTL_LFPSFILT;
if (dwc->rx_detect_poll_quirk)
reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL;
if (dwc->tx_de_emphasis_quirk)
reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis);
if (dwc->dis_u3_susphy_quirk)
reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
/* Select the HS PHY interface */
switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) {
case DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI:
if (dwc->hsphy_interface &&
!strncmp(dwc->hsphy_interface, "utmi", 4)) {
reg &= ~DWC3_GUSB2PHYCFG_ULPI_UTMI;
break;
} else if (dwc->hsphy_interface &&
!strncmp(dwc->hsphy_interface, "ulpi", 4)) {
reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
} else {
/* Relying on default value. */
if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI))
break;
}
/* FALLTHROUGH */
case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI:
/* Making sure the interface and PHY are operational */
ret = dwc3_soft_reset(dwc);
if (ret)
return ret;
tusb1210_clk_init(dwc);
udelay(1);
tusb1210_reset_f(dwc);
ret = dwc3_ulpi_init(dwc);
if (ret)
return ret;
/* FALLTHROUGH */
default:
break;
}
......
}
