AM5716: McASP frame sync configuration

Rong Wang2

Expert 1420 points

Part Number: AM5716

Hello,

I need to configuration McASP with following setting:

4 time slots, slot size=16 bit, frame rate 8K Hz. both of bit clock and frame clock are internal generated.

My question is :

if the bit clock(ACLKX= 2.048MHz), XMOD = 4( TDM, 4 time slots), in this configuration, does fs generated very 4 time slots? if yes, the rate is not 8K Hz. I am confused here.

any help is appreciated!

Ron

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

What software are you using?

0 Rong Wang2 over 8 years ago in reply to Biser Gatchev-XID

Expert 1420 points

Biser,

TI RTOS and CSL

regards,

Ron

0 Rahul Prabhu over 8 years ago

TI__Guru** 116870 points

Ron,

Yes, frame sync will be generated after every 4 TDM time slot. Look at the MCASP 32 bit access restrictions here and tricks to help with reading 16 bit data : processors.wiki.ti.com/.../McASP_Tips

Your bit clock should depend on what kind of analog signal are you trying to capture using MCASP. for example if the intent is to capture a signal that has freq from 0- 8Khz. Then this requires the ADC to sample the data at atleast 16 Khz.

If the samples are arriving at 16 Khz and the data is 16 bit with 4 time slots then. The MCASP recieve bbit clock should be 16 * 4 * 16 Khz = 1.024 Khz. If the 16 bit data is captured on a 32 bit time slot then you can use 2.048 bit clock. Hope this helps. you have the option of adjusting the sample rate on the ADC or to adjust the clocks

Regards,

Rahul

Regards,
Rahul

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AM5716: McASP frame sync configuration