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Need help with SPI programming in XLDR

Hi everyone,

The backlight on our system is connected to a DAC which receives data through SPI3 channel 1.  I need to turn on the backlight immediately at power-on, so I added a function to do that in main.c before jumping to boot loader.  However, the XLDR hangs at a place where a SPI-related register is written to.  The added function is shown below:

VOID Set BackLightOn()

{   

    OMAP_PRCM_PER_CM_REGS* pPrcmPerCM = OALPAtoUA(OMAP_PRCM_PER_CM_REGS_PA);

 

    OMAP_MCSPI_REGS *pSPI3Regs;

    OMAP_MCSPI_CHANNEL_REGS *pSPI3Channel1Regs;

   

    SETREG32(&pPrcmPerCM->CM_FCLKEN_PER, CM_CLKEN_MCSPI3);  // enable SPI3 clock

    SETREG32(&pPrcmPerCM->CM_ICLKEN_PER, CM_CLKEN_MCSPI3);

   pSPI3Regs = (OMAP_MCSPI_REGS *)OALPAtoUA(OMAP_MCSPI3_REGS_PA);

  

 

pSPI3Channel1Regs = (OMAP_MCSPI_CHANNEL_REGS *)OALPAtoUA((&pSPI3Regs->MCSPI_CHCONF1));

   // Disable all interrupts.

   OUTREG32(&pSPI3Regs->MCSPI_IRQENABLE, 0); // It hangs right here !!!

}

I appreciate very much any help/tips/comments that you can give me.

Luan

  • Luan,

    The McSPI3 FCLK and ICLK should be enable in CORE_CM not PER_CM.

    The suggested change is as follows:

        OMAP_PRCM_CORE_CM_REGS* pPrcmCoreCM = OALPAtoUA(OMAP_PRCM_CORE_CM_REGS_PA);
        OMAP_MCSPI_REGS *pSPI3Regs;
        OMAP_MCSPI_CHANNEL_REGS *pSPI3Channel1Regs;

        SETREG32(&pPrcmCoreCM->CM_FCLKEN1_CORE, CM_CLKEN_MCSPI3);  // enable SPI3 clock
        SETREG32(&pPrcmCoreCM->CM_ICLKEN1_CORE, CM_CLKEN_MCSPI3);
         pSPI3Regs = (OMAP_MCSPI_REGS *)OALPAtoUA(OMAP_MCSPI3_REGS_PA);

    Thanks,

    Tao

  • Hi Tao,

    You are a super engineer - your changes fix my problem.  Thank you very much.

    By the way, the XLDR also hangs if I add a few more lines of code but looking at the raw file TIEVM3530-nand.raw , it contains mostly zeros for the first four blocks.  How could we run out of room?  Would you please show me how I can find out how much code I can add to the XLDR.

    Thanks again,

    Luan

  • Luan,

    The default configuration in xldrnand.bib does not use all the SRAM space available. SRAM starts from 40200000. You can  change RAMIMAGE start address and size to see if it resolves your issue. Please make sure there is no overlap between different sections in this memory map.

        XLDRNAND                40206000  00005FF8  RAMIMAGE

    Do change xldrtocnand.raw accordingly to reflect the new size and starting address.

    Hope this helps.

    -Tao

  • Hi Tao,

     

    First configure pin-multiplex for the spi  related pins and the do the clock related configuration. After this you can use your function.

     

    -MGM