I am using DMA to pull samples from I2S3 (source) and send them to an audio codec thru I2S0.
For doing that, i am using DMA in ping/pong mode, etc ...
While the whole path works reasonably well (+- some odds in the sound quality, but this is another issue) i noticed that regularly get
spurious DMA interrupts. For exemaple, i would get an interrupt from DMA instance 0 with all bits th DMAIFR = 0 !
Same with Instance3, interrupt from DMA instance 3 with all flags of DMAIFR set to 0.
I am using DSP/BIOS with a dispatcher. I checked carefully the handler, this looks like definitely correct.
Somewhere in the forum, i read a similar issue and there, the problem was that some DMA channels are "hardcoded" to work
with a specific periph. So if you choose another channel, then you get spurious ints. I am using Channels 0 to Read from I2S, channel 1 to write
Is that the case for the C5534 ? I couldn't find any hint in all the spec and datasheet.