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TMS320C6748: Problem booting from SPI EEPROM

Part Number: TMS320C6748

We have a L138/C6748 Development Kit board and we are trying to boot from an EEPROM on SPI1.

We have a .out file that when loaded to the board using the JTAG and CCS v7 works correctly.

We built an AISgen.bin file using the AISgen Tool for D800K800 version 1.13. We used the same settings as in the gel file used to create the .out file  for the PLL0 and PLL1 and for the DDR settings we used the same values as in the LCDK_AISGen_Config.cfg file

 

The AISgen.bin file was programmed to the EEPROM using SPIWrite.

The Dip switch is set to 00001001 - (SPI1 EEPROM)

When booting we get the the following on a scope:

Yellow: CS 0 of SPI1

Green SPI1 clock

Red: SPI1 MISO 

The CS is going high after reading only 5 bytes of data from the EEPROM instead of reading the whole data stored in the EEPROM,  

What could be causing the CS 0 go high? Is there any setting on the board or in the AISgen tool that we are missing?

Regards 

Michael 

  • Hi Michael,

    I've notified the design team to elaborate.

    Best Regards,
    Yordan
  • Michael,

    The LCDK_AISGen_config.cfg is designed for NAND boot so you need to be careful while reusing it for your setup. The LCDK configuration is assuming that the input clock is 24 Mhz and that there is DDR2 memory on the board. Also, you need to go into peripheral tab and make sure that the SPI clock settings is configured correctly . the device initially boots with PLL in bypass and then tries to configure the clocks on the board based on configuration in the AIS image.

    For SPI specifically, I would recommend that you look at the images here, which were created for the LogicPD EVM (EOL in 2012). the EVM had a SPI flash so it might provide configuration that is more suited for your platform. That platform had a mDDR memory so you will need to modify the settings if you are using DDR2.
    processors.wiki.ti.com/.../Boot_Images_for_OMAP-L138

    One other great way to debug boot issues is to run the Debug GEL file on the DSP core when the boot fails:
    processors.wiki.ti.com/.../OMAP-L1x_Debug_Gel_Files

    Can you capture the log to see if the ROM code is detecting any error when reading the image. This will also capture the Program counter of the DSP which can be used to trace where in the ROM code the DSP is hung so might help provide additional inssights.

    Regards,
    Rahul
  • Hi Rahul,

    Thank you for your reply. Because of memory size, we decided to change from a SPI EEPROM to a SPI Flash with more memory and we were able to boot with this one.

    By the way, how do you run the debug gel file in ccs v7? It does not have a GEL or Tool Option in the Menu.

    Regards

    Michael