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TMS320C6655: The constraints for some clock inputs on TMS320C6655

Nomo
Guru 16800 points
Part Number: TMS320C6655


Hello,

My customers have two questions about the constraints for some clock inputs on TMS320C6655.

1.Do you have any constraints for CORECLK other than the description of Table 5-6 in the datasheet?

2.Do you have any constraints for PCIECLK other than certification of PCIe CEM?

Best Regards,
Nomo

  • 0
    TI__Guru**** 161600 points
    Hi Nomo,

    1). Correct. Those are the clock input riming requirements.

    2) Section 6.14 of the Datasheet answers this question:
    "The PCIe electrical requirements are fully specified in the PCI Express Base Specification Revision 2.0 of PCI-SIG. TI has performed the simulation and system characterization to ensure all PCIe interface timings in this solution are met; therefore, no electrical data/timing information is supplied here for this interface."

    Best Regards,
    Yordan