• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 97 subscribers
  • Views 405 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5K2E02: Power on reset

Dave Hyslop
Prodigy 390 points

Part Number: AM5K2E02

Our customer is looking into the use of the AM5K2E02 Dual Core ARM KeyStone II System-on-Chip (SoC) processor in an application where one of the cores would be disabled.

 

Having read through the datasheet I notice the following warning.

 

“10.2.1.3 Prolonged Resets

 

Holding the device in POR, RESETFULL, or RESET for long periods of time may affect the long-term

reliability of the part (due to an elevated voltage condition that can stress the part). The device should not

be held in a reset for times exceeding one hour at a time and no more than 5% of the total lifetime for

which the device is powered-up. Exceeding these limits will cause a gradual reduction in the reliability of

the part. This can be avoided by allowing the device to boot and then configuring it to enter a hibernation

state soon after power is applied. This will satisfy the reset requirement while limiting the power

consumption of the device.”

 

I would be grateful if you could obtain answers to the following questions:

 

  1. In relation to the above warning, are there any similar effects on the reliability of the device if one core is disabled?

  2. Are there any Application Notes or User Guides that describe methods of how to disable one of the ARM cores ?

  • 0
    TI__Guru**** 161600 points
    Hi Dave,

    In relation to the above warning, are there any similar effects on the reliability of the device if one core is disabled?

    No, using only one of the ARM cores should not affect the reliability of the device.

    Are there any Application Notes or User Guides that describe methods of how to disable one of the ARM cores ?

    This depends on what OS are you using.
    For example if you use Linux, you can disable the ARM core by turning off the SMP (from defconfig file):
    Remove the bellow lines from the defconfig file:
    CONFIG_HAVE_SMP=y
    CONFIG_SMP=y
    CONFIG_SMP_ON_UP=y

    Or change the NR_CPUS in the defconfig file:
    CONFIG_NR_CPUS=X ==> X is the number of CPUS you'd like to use.

    Or from the filesystem, using:
    cat /proc/cpuinfo --> to obtain information on how many cores you have in the device
    echo 0 > /sys/devices/system/cpu/cpuX/online --> to disable the arm core X
    echo 1 > /sys/devices/system/cpu/cpuX/online --> to enable the arm core X

    For RTOS you can use the config files to tell which core is in use. When running some application with CCS you can connect to a particular core and execute the app on that core alone.

    Best Regards,
    Yordan