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AM5718: Video Capture and Encoding

Part Number: AM5718

Hi team,

We are working on a DVR-like application where we have 2 camera inputs over CSI-2 streaming up to 1080p30 video.

Here are the questions that we have related to our application (video capture and encoding):

  1. With two streams, do we need a shared memory bank?
  2. Do the encoded streams use DMA by default or do we need to write that driver?
  3. Do we need something like webrtc or ffmpeg to sync audio?
  4. We expect the video and audio to be synced in the encoding. Are there sync markers in the audio/video streams or do we need to provide those markers?
  5. Can we verify that the data coming from the encoder is marked and synced from each camera (e.g. Cam 1 or Cam 2)?
  6. Any other design considerations? Coding concern?
  7. Is the ARM NEON engine available on this chip?

[Software questions have been moved to another thread: https://e2e.ti.com/support/arm/sitara_arm/f/791/t/673942] 

Regards,

Akash Patel

  • The forum policy is one question per thread. Please open a new thread for your software related questions. This thread will continue with support on your video related questions.
  • Hi Biser,

    Thank you. I have moved the software questions to this thread and removed them from my original post: e2e.ti.com/.../673942

    Regards,
    Akash
  • Hi Akash,

    Note that CSI-2 driver is not applicable on RTOS Processor SDK. Here's the tentative data flow for your usecase on Linux- 

    1. CAPTURE

    The CSI-2 cameras will be hooked to two separate CSI-2 PHYs using 2 lanes each. The cameras will be populated as two separated /dev/videoX nodes. The CSI-2 driver is linux based driver running on A15. It will capture the video from both of these nodes using the V4L2 framework and write the data in DDR memory.  The application will have knowledge which video is coming from which camera based on the device node address. The video capture driver also time stamps each captured frame. The timestamp information can be retrieved when doing V4l2 dequeue() operation. 

    2. ENCODING

    The captured buffer can be shared with H.264 encoder (running on IVA-HD and controlled by M4) using dmabuf driver export/import feature and hence no need for additional buffer copy for encoding purpose. Both CSI-2 and IVA-HD has their own DMA engine to access the video buffer from/to DDR. 

    3. STREAMING

    The compressed video will be received by A15. The application then needs to manage the timestamp from the captured video/audio (Assuming the audio capture will also be timestamped) and stream the data. It is up to the application how they want to do the AV SYNC and stream the data. If you use gstreamer framework, then possibly you may get some plugins that can achieve this. 

    Hope this answers Q #1 to #6 above. Regarding #7 -

    Akash Patel said:
    Is the ARM NEON engine available on this chip?

    Yes, it is available on this chip.