TDA2EVM5777: Comparing bvlc caffe trained model inference output layer by layer with TIDL Host Emulation inference Output

Part Number: TDA2EVM5777

Hi Kumar,

I am trying to compare the inference output layer by layer in normal bvlc caffe and TIDL Host Emulation.

Only first layer output of TIDL Host Emulation, I could match with bvlc caffe (Because it is just the input image as it is). Rest of the output , are not matching. Is there any proper way to validate bvlc caffe trained model and TIDL converted caffe model.

1. BVLC Caffe 

- image.jpg

- deploy.prototxt

- model.caffemodel

- Here I have written a quantization code same as TIDL in python.

- Conv Layer output which will be in floating points , I am quantizing to 8 bit . To match this with TIDL Conv Layer Output

2. TIDL Caffe (Host Emulation)

- image.y

- deploy_net.bin

- model_param.bin

- During inference, let say i am getting conv layer output  in out trace_dump_0_50x50.y

- This is already a quantized output. So, I am trying to match this with BVLC caffe quantized output.

I have also written python scripts for conversion of .y having shape (1x n ) to .data having shape (h,w, ch) and vice a versa. 

I am not getting same output .

Is the above method correct ? 

Regards,

Sagar