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DM647/8 McASP Data Out problems....

JRasmussen
Intellectual 720 points

Hello,

I'm having a couple of problems with the McASP on our DM647 chip.  We are using 8 McASP Serializers as output only.  We do not use the McASP to receive input, so we have disabled entirely the Receive Control Section of the McASP;  we're only using the Transmit section of the McASP.  We are having these serializers transmit data in I2C format sending out two data samples (L and R audio) on each of the 8 serializers at a 48K rate..  The Clock to the McASP is on the AHCLKIN pin at a Frequency of 12.2Mhz.

I have set up the McASP according the the McASP's User's Guide, and the I2S Frame sync and Clocks are running correctly at the expected frequencies (16-bit TDM/I2S slots).  However, I see no Data on the output of the Serializers...(and, yes, I have set the Pinfunc and Pindir registers correctly).  All data is showing '0s'.  Also, I am getting the Xdata interrupt from the Serializers at a rate far greater than 96K rate (2 x 48k  (1 of 2 timeslots) which is causing the DSP Bios application to use all of its scheduling and resources in servicing the interrupt (which is writing the next Audio sample into the XRBUF location).  BTW, we are having the DSP service these interrupts instead of the EDMA peripheral.

Am I making a common error perhaps in how the Serializers are clocked and started?  What would cause the XData Interrupt to Set and Never go away (even though the Interrupt routine is trying to clear the Xdata interrupt bit (in XSTAT) every time it executes)?

No, I am not and will not be using the CSLR or PSP drivers other than for reference....which I did when checking over my McASP initialization routine and found my routine was almost identical to the PSP initialization for the McASP.

Thanks.

 

  • 0
    Intellectual 720 points

    Additional Info:

    It looks like I have everything working except for something wrong in the startup or configuration of the Serializer Channels themselves.  The McASP state machine appears to be working, and, in fact, is not reporting any errors to me...clearly indicating that the Data is being written to the serializer in time.  The XSTAT register shows that the Timeslots are toggling correctly as well.

    Can someone please tell me what would maybe cause the following problems:

    1.  XDATA interrupt is not clearing in XSTAT from my interrupt routine, and is triggering continuously (and causing way too many interrupts to allow our DSP Bios Application to run).  What would cause the XDATA interrupt to behave like it is full time asserted and never clearing?  BTW, if I use both the XSTAFRM and XLAST interrupts in place of the XDATA interrupt, I get interrupts at the correct intervals on the I2S/2 TDM timeslot format I'm using, and the rest of the DSP Bios Task works correctly as well.  On these interrupts, I am writing another word of Data to the Serializers, and I am not seeing any underrun errors.  In short, it looks like it is working.

    2.  I am writing data to the Serializer XRBUF areas starting at 0x2040200 on the DM648, and the state machine/XSTAT registers do not give me an underrun error, but do report which timeslot is being transmitted at the time.  However, I've yet to see any Data on the output pins of the serializer.  I have no Data Masked, and the Timeslots enabled.  I am using 16bit data, however, I am writing a 32-bit alternating Data Pattern of 0x55555555 and 0xaaaaaaaa to the XRBUFs of the Serializers.  All I ever see is a Low Level '0' at the output of the serializer.  Is there some special clocking occurring on the Serializer Registers themselves that I might have overlooked?  How exactly are the Serializer Channels being clocked?

    My back is against the wall, and I've got to get these questions resolved today.  Any help would be appreciated.

    Thanks,

     

  • 0 in reply to JRasmussen
    Intellectual 720 points

    SOLVED PROBLEM:

    It was a documentation error in the DM647/DM648 Datasheet, where it shows different McASP XRBuffer Memory Addresses from the Master Memory Map in the same Datasheet.  For the record, the Master Memory Map in the Datasheet is correct showing the McASP Data Area.  My application wasn't working because it wasn't sending Audio Data to the correct Memory Locations.  Once I got the right addresses, everything works well.

     

     

     

  • 0 in reply to JRasmussen
    TI__Mastermind 18130 points

    James,

    I am glad to hear you found the cause of your problem. Would you mind submitting this feedback to the document owners (you can click the Submit Documentation Feedback at the bottom of the datasheet)?