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TDA2: EVE can not perform simple DMA transfer after executing TIDL

Part Number: TDA2

Hi,

When EVE tries to perform the simple 1-D DMA transfer from external memory to IBUFA after executing TIDL library, the simple 1-D DMA transfer does not work. .

In our case EVE first runs our simple 1-D DMA transfer and it performs well,  then EVE runs TIDL and later EVE run our simple 1-D DMA transfer again and it does not work. (the data in external memory is not actually copied to IBUFA  on the completion of the simple 1-D DMA transfer)

Our module implemented the simple 1-D DMA transfer by following the source code in eve_sw_01_12_00_00\starterware\examples\edma_simple_eve\src\main.c, which uses register level CSL for edma to setup single 1D -> 1D transfer.

However, the TIDL uses DMA_UTILS to perform auto-increment DMA and somehow it nullifies the later our simple 1-D DMA transfer.

Even we change our 1-D DMA transfer by not using register level CSL APIs but using DMA_UTILS APIs. our 1-D DMA still did not work after running TIDL.

We wonder if there is a universal method to implement our 1-D DMA (moreover, 1D -> 2D, 2D -> 1D DMA) and work well with other coexistent module using DMA such as TIDL?

Mark.

  • Hi Mark,
    Can you check the status of edmaCC->IPR register after executing TIDL?

    Regards,
    Anshu
  • Hi Mark,
    We haven't heard from you on this. Is this issue resolved?

    Regards,
    Anshu
  • Hi Mark,
    We haven't heard back from you on this issue. We are closing this issue, if you still have problems you can reopen it again.

    Regards,
    Anshu
  • Hi Anshu,

    We try three test cases and two scenarios and get the same interesting result.
    DMA works well when source and destination are both DRAM, but DMA fails at 2nd time when destination is IBUFA(EVE internal RAM).
    So the problem could be related to why IBUFA can't be accessed by DMA after executing TIDL.

    We doubt TIDL does not restore EVE internal buffer switch so that DMA can't not access IBUFA.

    Our test cases and scenarios are:

    [test A] use our simple 1D dma to do the test
    step 1: run our simple 1D DMA.
    step 2: run TIDL.
    step 3: run our simple 1D DMA again.

    [test B] use the example the same as file REL.DMAUTILS.00.08.00.02\dmautils\test\edma_utils_autoincrement_1d_test\src\edma_utils_autoincrement_1d_test.c
    to do the test
    step 1: run edma_utils_autoincrement_1d_test.
    step 2: run TIDL.
    step 3: run edma_utils_autoincrement_1d_test again. (OK for DMA transfer from DRAM to DRAM. Fail for DMA transfer from DRAM to EVE IBUF_A)

    [test C]: use the API EDMA_UTILS_memcpy2D() to do the test
    step 1: run EDMA_UTILS_memcpy2D().
    step 2: run TIDL.
    step 3: run EDMA_UTILS_memcpy2D() again.

    <scenario 1>: DMA transfer from DRAM to DRAM, for all three tests.
    DMA transfer OK in step 1.
    DMA transfer OK in step 3.

    <scenario 2>: DMA transfer from DRAM to IBUFA, for all three tests.
    DMA transfer OK in step 1.
    DMA transfer fails in step 3. (but the return code of DMA function shows no error)

    Mark.

  • Hi Mark,
    As requested earlier can you check the value IPR register before and after executing TIDL just to check if there are any interrupts pending in EDMA. You can see the value of this register using CSL overlay structure for EDMA (CSL_EdmaccRegsOvly->IPR). Also can you mention the version of TIDL which you are using?

    Regards,
    Anshu
  • Hi Anshu,

    The version of TIDL we used is REL.TIDLSRC.01.00.00.00

    Mark.
  • Mark,
    Can you read the value (32bits) at the following memory location before and after executing TIDL 0x400A1068 ( This corresponds to IPR register)?

    Regards,
    Anshu
  • Hi Anshu,

    I use the following code to get the content of IPR register:    
        
        volatile unsigned int IPR_value;
        volatile unsigned int *pEDMA_CC_IPR = (volatile unsigned int *) 0x400A1068;
           
        IPR_value = *pEDMA_CC_IPR;   
        printf("EDMA_CC_IPR(0x%08x) = 0x%08x \r\n", pEDMA_CC_IPR, IPR_value);

    And the results are:     
      Before running TIDL: EDMA_CC_IPR(0x400a1068) = 0x00000000
      After running TIDL:  EDMA_CC_IPR(0x400a1068) = 0x00000000
        
    Mark.   

  • Hi Mark,
    I dont see any issue which could cause the behavior which you are observing. Can you share you simple DMA code so that we can try it at our end?

    Regards,
    Anshu
  • Hi Anshu,

    We find out the root cause is not only related to EDMA but also EVE IBUF switch.

    After switching to correct IBUF view, EDMA can transfer from DRAM to IBUFA correctly in [test B] and [test C].

    Mark.