Part Number: AM5716
Tool/software: TI-RTOS
I am using McASP1 and STSEM_EDMA to transfer data between McASP1 and data buffer on DSP core of AM5716 with bios_6_50_01_12. the completion of each EDMA transfer will triger a INT4 and my ISR will post a swi.
I pre-wirte some data such as 0xFFFF into Ping and Pong buffer. after my code is running, I can see the data I write to ping pong bufer are in right time slots of McASP1 TX using oscilloscope. however, if I write same date to the ping pong buffer from swi or ISR, just like following:
void interrupt4(void)
{
switch(EDMA_3CC_IPR)
{
case 1: // TCC = 0
procBuffer1 = PING; // process ping
EDMA_3CC_ICR = 0x0001; // clear EDMA3 IPR bit TCC
outPtr_code1 =&pingOUT1[0];
inPtr_code1 =&pingIN1[0];
pingOUT1[0]=0xffff;
break;
case 2: // TCC = 1
procBuffer1 = PONG; // process pong
EDMA_3CC_ICR = 0x0002; // clear EDMA3 IPR bit TCC
outPtr_code1 =&pongOUT1[0];
inPtr_code1 =&pongIN1[0];
pongOUT1[0]=0xffff;
break;
default:
EDMA_3CC_ICR = 0x0000f; // clear EDMA3 IPR bits 0 and 1
break;
}
EVTCLR1 = 0x00000001; // clear DSP event 32
Swi_post(swi_handle0);
return;
}
in my swi function, I just wirte data to buffer like following:
*outPtr_code1 = 0xffff;
then I did not see anything in first time slot( actually nothing in any time slots) from the scope. I tried write from ISR or swi. the same results. I have verified use emulator that the data are wirtten into buffer. but it seems not be transfered to McASP1. I verified the ISR is called at the right rate, meaning EDMA sending interrupt request. but I just see nothing on scope. if I comment out the code write to buffer, then I see the pre- wirte the data on each time slot.
what could cause this problem?
Thanks in advance!
Ron
