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AM5718: DISPC_CONTROL1 register GOLCD bit

Shinji Ueda
Expert 5440 points

Part Number: AM5718

Hi champs,

I have a question about vout1_clk output and GOLCD bit.

After the vout1 clock stabilizes, I'd like to set GPIO.
So, it checked DISPC_CONTROL1[5] GOLCD bit, then it sets GPIO.

However GPIO set before vout1_clk stabilized.


1. Is there a problem this check method?
2. If previous question is OK, do you know the reason why GPIO set before vout1_clk stabilized?

Best regards,

Shinji Ueda

  • 0
    TI__Guru**** 393215 points
    You must set GOLCD bit to 0x1 when you have finished to program the shadow registers of the pipeline(s) associated with the LCD output and the hardware can update the internal registers at the VFP start period.

    The hardware resets the GOLCD bit when the update is completed. When you read 0x0 form GOLCD the hardware has finished updating the internal shadow registers of the pipeline(s) connected to the LCD output using the user values.

    These are internal operations and are not indicative in any way of the VOUT clock state.