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TMS320VC5507: Which regulator do you recommend for TMS320VC5507?

Part Number: TMS320VC5507
Other Parts Discussed in Thread: LM317, TMS320VC5509A, TPS65023

Hi,

According to the TMS320VC5507 datasheet, I want to have all of these three core voltages on my board. Related to this I have some questions:

#1-What regulators do you recommend me to have all of these voltages on my board? I have one candidate in mind. In order to have 3.3 v for IO voltage and 1.6 v for core voltage at the 200 MHz frequency, I want to use TPS767D301 or TPS76601. But as I want to have two other core voltages (1.2 v at 108 MHz and 1.35 at 144 MHz) I have to use two other regulators, LM317 for 1.35 v and LD1117 for 1.2 v. My issue is that I should use 3 regulators in this way and it populates my board and makes ti bigger. Is there any other way to have for example one or two regulators instead of three ones. In other words, is there any regulators with three outputs appropriate for me (one 3.3 v fixed output and two other adjustable outputs with a  minimum that covers 1.2 v>>>>> consider this matter that e.g. TPS767D301 adjustable output range is from 1.5 v to 5.5 v so it is not good)

#2- Related to the question #1, is there any dual-output regulator with appropriate range for me that contains 1.2 v up to 2.5 v? If yes I'll use two different resistor with a header and a jumper or a potentiometer instead of them to have 1.2 v  and 1.35 v whenever I want  (just by turning the potentiometer or using suitable resistor).The image bellow illustrates better (it is related to another project that I should have an adjustable output voltage in the range of 1.5 v to 2.5 v to test an ADC circuit)

In this way there is no need of a regulator with three outputs and a dual-output regulator with one adjustable output that contains appropriate range of output voltage is useful.

#3- What is the reason that TMS320VC5507 or TMS320VC5509A allow the designer to provide each of 1.2 v, 1.35 v and 1.6 v for core voltage while if there were just 1.6 v at the maximum core frequency the programmer could divide the clock frequency to any lower frequency in his/her C program? I don't find out the practical reason. Maybe power consumption. I really like to know if there is any other important reason.

Regards,

Hossein

  • I am still waiting for a response.

    Thanks
  • Hi Hossein,

    Have you considered the TPS65023 PMIC?

    We use this on several of our C55xx EVMs.

    VDCDC1 converter defaults to 1.2 V or 1.6 V depending on the DEFDCDC1 configuration pin.

    VDCDC2 converter defaults to 1.8 V or 3.3 V depending on the DEFDCDC2 configuration pin

    VLDO1 and VLDO2 can output 1.3 V and 3.3V respectively, when DEVLDO2 = DEVLDO1 = 0

    You may use resistor populations to select VDDC from VDCDC1 or VLDO1 when you need 1.2/1.6V or 1.3V

    I believe you can run the CVDD voltage at 1.6V even when running the system clock at 108 MHz.

    The provided ranges are likely to conserve power consumption.

    Hope this helps,

    Mark