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AM5728: MMC questions

Thomas Yang55737
Expert 6236 points

Part Number: AM5728

Hi Expert,

1. In my customer design, AM5728 MMC2 needs to connect to emmc nand flash v5.0, 16GB, 8bit, and expects it work in HS200 mode. Based on spec, in HS200 mode, it is 1.8V IO voltage. In AM5728 GP EVM, MMC2 is connected to 3.3V and doesn’t support HS200. Can MMC2 supports HS200 mode if it is connected to 1.8V? If it supports HS200 mode, does it need to change initialization voltage 3.3V to 1.8V as I saw there is a register to control this?

2 MMC3 is connected to a Wifi module through SDIO, for MMC3 SDR50 mode, the max clock frequency is 64MHz, in datasheet table 7-132. But in SDIO 3.0 spec, the SDR50 mode max clock can reach 100MHz. Is AM5728 really constrained to 64Mhz? If so, AM5728 does not fully comply with SDR50 mode.

Also in TRM 25-1, it mentions that SDR50 up to 48MBps (96M clock) – MMC1 and MMC3 only, for MMC3, it is also conflicted with table 7-132 (64M max), could you clarify on this?

 In DM, Table 7-132

In TRM, 25.1

  • 0
    TI__Guru**** 393215 points
    The factory team have been notified. They will respond here.
  • 0 in reply to Biser Gatchev-XID
    TI__Guru 64655 points

    The AM5728 MMC2 interface can support HS200 mode if the I/O supply of the attached eMMC device and MMC2 I/O supply (VDDSHV11) is connected to fixed 1.8 V power source, and the corresponding voltage control registers are modified to reflect the operating voltage status correctly.  For instance, MMCHS_AC12[19] V1V8_SIGEN = 0x1, MMCHS_AC12[18:16] UHSMS = 0x3, MMCHS_HCTL[11:9] = 0x5, and MMCHS_CAPA[26] = 0x1.

     

    I need to confirm which document is correct with respect to max operating frequency of MMC3.

     

    Regards,

    Paul

  • 0 in reply to peaves
    TI__Genius 15510 points
    The silicon errata i887 says that the maximum frequency for mmc3 is 64MHz.

    Steve K.
  • 0 in reply to Steve Kipisz
    TI__Guru 64655 points

    I have confirmed the data sheet is correct.  As indicated by Steve, this has been addressed in the Silicon Errata.

    Regards,
    Paul

  • 0 in reply to peaves
    Expert 1080 points

    Hi,

    Regarding the eMMC NAND IO voltage under HS200 mode, you mentioned it should be connected to a fixed 1.8V, meanwhile the corrsponding register should be modified. 

    However, I read AM5728 IDK EVM user guide's Appendix A Known Deficiencies in AM572x IDK EVM:

    The interface voltage for the eMMC is fixed at 3.3V in all modes of operation. This prevents support of
    HS200 which requires a transition to 1.8V. The AM572x IDK EVM does support this voltage shift for the
    SDCARD attached to the MMC1 port. The MMC1 port is on VDDSHV8 supply that is attached to the
    LDO1 PMIC output that supports this voltage shift for higher speed modes. The eMMC is attached to the
    VDDSHV11 supply fixed at 3.3V. Board designs that require HS200 support for eMMC would need a
    solution to transition from 3.3V to 1.8V under software control. 

    The user guide seems telling me that to enable HS200 mode, the IO voltage need a transition process from 3.3V to 1.8V under software control. Does this mean we need to connect VDDSHV11 to 3.3V as a default state, then during the system boot up, in certain timing point, shift the VDDSHV11 connection to 1.8V? If my understanding is correct, do yo have example design to show how this shift can be accomplished which can well sync the voltage re-connect  and software register change?

  • 0 in reply to yf liao
    TI__Guru 64655 points

    The AM572x IDK EVM User Guide mentions this limitation because the AM572x MMC2 and NAND I/O power supply pins were sourced from a fixed 3.3 volt supply rather than a fixed 1.8 volt supply. The NAND requires the I/O voltage to be 1.8 volts when operating in HS200 mode. Therefore, the AM572x IDK EVM is not able to support HS200 on MMC2.

    This limitation would not exist if a fixed 1.8 volt supply had been used to power the AM572x MMC2 and NAND I/O power supply pins. When using a fixed 1.8 volt I/O source, the MMC host controller and NAND doesn’t realize their I/Os are operating at 1.8 volts during initialization. So the initialization is the same except the I/Os are operating at 1.8 volts. Once the host determines the NAND supports HS200 it will send a command to the NAND telling it to change modes. Since the I/O supply is already 1.8 volts, everything proceeds as expected.

    Regards,
    Paul