AM5716: UART RX idle and DMA transfer

Carlo,

Colombo Carlo said:

However, the Sitara reference manual says that the time-out interrupt (related to RX IDLE) the counter counts only when there is some data in RX FIFO.

but  the DMA is always fetching data from the RX FIFO, so I understand that I ll never get the RX IDLE interrupt .

I have looped in a spec expert to help with this question. Let me share my thoughts based on the my read of the spec and the expert can provide additional feedback. If you check the RX FIFO interrupt request generation mechanism (Fig 24-60) and the Receive FIFO DMA request generation Fig (24-62) then it seems that DMA is triggered for fetching data from RX FIFO only when the programmable threshold is reached.

The TX and RX FIFO threshold defined in UART_TLR register is used to trigger the DMA transfers from FIFO. If you can have a situation where there is data in FIFO which has not hit the threshold then the timeout RX IDLE will be triggered when there is a line break.

Regards,
Rahul

Carlo,

In your first E2E post, you indicated that RX IDLE interrupt will never occur when DMA is transferring from RX FIFO. My response was clarification for your interpretation of the TRM and to indicate that RX IDLE interrupt even if DMA is transferring data from RX FIFO. Could you elaborate why the customer usecase requires DMA to transfer data when timeout or line break error occurs?

I am checking internally if there is any way by which RX_IDLE can be used to trigger DMA transfer directly.

Regards,
Rahul

Carlo,

The test to checkout timeout implementation with UART LLD driver is provided in the source file in the location that you care looking at :

pdk_am57xx_1_0_10\packages\ti\drv\uart\test\src\main_uart_test

Look for the function UART_test_timeout in that file. the time out configured by adding the following to the transaction:

transaction.timeout = UART_TEST_TIMEOUT;

This timeout implementation is software implementation of timeout for a UART transaction so there is no reference to this in the AM572x TRM.  In the UART LLD API and configuration you can refer to the transaction structure here:

pdk_am57xx_1_0_10/packages/ti/drv/uart/docs/doxygen/html/struct_u_a_r_t___transaction__s.html

Regards,

Rahul