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Linux/AM3354: DDR3 recognition in code

Part Number: AM3354

Tool/software: Linux

hi 

  we have boards running on AM3354.

  right now we need to change the DDR3 chip to replace the original one.

  now in the u-boot ddr-defs.h. i know there's this bunch of calibration results that are used for DDR initialization.

#define DDR3_EMIF_READ_LATENCY 0x00010027//Brad /* Enable Dynamic Power Down */ 
#define DDR3_EMIF_TIM1 0x0AAAF51B 
#define DDR3_EMIF_TIM2 0x26437FDA 
#define DDR3_EMIF_TIM3 0x501F83FF 
#define DDR3_EMIF_SDCFG 0x62C05332//Brad 
#define DDR3_EMIF_SDREF 0x0000093B 
#define DDR3_ZQ_CFG 0x50074BE4 
#define DDR3_DLL_LOCK_DIFF 0x4//Brad 
#define DDR3_RATIO 0x80 
#define DDR3_INVERT_CLKOUT 0x0 
#define DDR3_RD_DQS 0x3A 
#define DDR3_WR_DQS 0x5A 
#define DDR3_PHY_WR_DATA 0x8F 
#define DDR3_PHY_FIFO_WE 0xA7 
#define DDR3_IOCTRL_VALUE 0x18B

  My problem is.Is it possible to place several different groups of calibration result for different ddr chips .

  and dynamically identify which calibration result should be used depending on which ddr chip is installed on board?

  I don't know if there's any "ID register" or similar things to identify different DDR chips?

thanks

yandong

  • If the DDR3 memories you use are of the same size, data width, and speed bin, then you should be able to interchange them without any code changes.

    If there are differences in size, data width, and speed bin, then in my opinion the best way to go would be to have some hardware detection method (e.g. GPIO inputs) or use an I2C EEPROM to store the DDR3 identification.
  • Thanks for the reply Biser.
    the new chip is same in size,data width. But speed bin is different.
    that's why i need a new calibration for the new ddr chip.

    the methods you suggested like:
    "hardware detection method (e.g. GPIO inputs) or use an I2C EEPROM to store the DDR3 identification"
    it seems without any schematic modification.
    it's not possible to detect different ddr models purely from u-boot software then.

    yandong
  • No, you have to initialize the EMIF first, but to do this you need to know the DDR timings. By the way if the new memory is a faster speed bin, you can try with the old timings before trying anything else. Speed bins are backward compatible.
  • Yandong,

    If the new memory you're using is the exact same memory but a different speed grade, then you should be able to just drop it into the design with no changes.

    If there was a major change to the memory (e.g. die shrink with new timings, different manufacturer, etc.), then you have a couple options:

    1. You'd need some kind of board revision ID that you program in your production flow in order to specify which DDR3 IC is present.  Your software could then utilize the corresponding timings.
    2. You could "merge" your sets of DDR timings to come up with a universal set of timings that will work on all boards.  For this to work you would also need to sanity check the software leveling results to make sure they're similar.  If there's a big change in software leveling output, this might not be possible.

    Brad

  • thanks Biser.

  • Hi Brad:
    thanks for the reply.
    for some reason i haven't got the email notification.So i didn't know this thread is replied by you.
    Your idea of "merge" the parameter sound brilliant.
    Right now i've decided to use different software for different DDR chip. which is operational safer i guess.
    I'm closing this thread.
    thanks for the help


    yandong