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cmem and Beagleboard

I am trying to modify the example located at "C6Run_0_94_04_04/test/c6runlib/cio_fxns". 
On ARM side i am taking 3 int. pointers ptra, ptrb, ptrc. I want the dsp to do the operation: c= a+b;
I am assigning values of ptra and ptrb on ARM side and then passing the physical addresses of both to the DSP.
The output i am getting on the Beagleboard is:
================================================
root@beagleboard:~/dspeasy# ./cio_fxns_dsp
ARM: Physical Address; a: 0x87eff000, b: 0x87efe000, c: 0x87efd000 
ARM: Virtual Address;  a: 0x4001e000, b: 0x4001f000, c: 0x40020000 Value of c= 0
DSP: Address of a: 0x87eff000, address of b: 0x87efe000, address of c: 0x87efd000 value of c= 0
DSP: ptra = 5, ptrb = 7, ptrc = 12 
ARM: value of ptra:5 ptrb:7 ptrc:0 
=================================================
Here i dont understand that why ARM side is not able to see the value of ptrc calculated by the DSP, even though they both refer to the same memory location?
PS: Here "ARM" shows output from ARM and "DSP" shows output from DSP. I am also doing "CEM_cacheWbInv" just before printing value of ptrc in the last line of output.

Thanks,
Bhargav

  • Bhargav,

    There are quite a few things wrong with this example, but they can all be summarized by saying that you are trying to do things that should be done by the C6Run framework (managing CMEM, doing virtual to physical address translation, etc.).  One of the objectives of the C6Run tool is to make DSP development as transparent as possible to the end user. If you properly code up the application, you should never call CMEM and DSPLink APIs directly.  I've included your example code modified to using the C6Run framework as it should be used.  Note that the remote procedure (cio_fxns_printf) has now been changed to have pointer arguments, which it must have if you want to ensure automatic cache coherency managment by the framework.  Passing memory pointers as integer values prevents the C6Run remote procedure call stub generator from recognizing that you may be modifying the same memory on both cores.

    Regards, Daniel

    cio_fxns_my.zip
  • Thank you Daniel. This really helps to understand what was going on.

    Do you know if i can use some synchronization constructs to protect the shared data, when i use threads on ARM-side.

  • Bhargav,

    Because function calls that execute on the DSP are synchronous, you will never have issues within a single ARM Linux thread.  But if you have multiple threads on the ARM, and one thread gives a shared buffer to the DSP for it to use, you will want to make sure no other thread is modifying it at the same time, so something like a mutex or some other kind of lock would be appropriate.

    Regards, Daniel

  • I think "C6RUN_MEM_malloc()" API allocates memory on the Heap. What should i use to allocate it on Pools instead?

    Thanks,

    Bhargav

  • C6Run does not provide any sort of wrappers around the DSPLink POOL APIs. The CMEM region, which is accessed through the C6RUN_MEM_* APIs), is treated entirely as a heap. You can use the DSPLink POOL APIs directly if you want, but the C6Run framework will not be able to manage POOL-based buffers that you want to share between cores.

    Regards, Daniel