Uart1 - ttyS1 as dual console along ttyS0 on an DM365 EVM (Rev E.)

Hi Manfred,

I set up UART1 on LeopardBoard365.
It's been some time ago, but as i remember,
you also have to add in  mux_cfg.c : const :   "dm365_uart1_pins[]"  (similar to existing "dm365_uart0_pins[]") ,  and then add it to "dm365_pins". 

Marko.

Hi Marko, 

Thanks for the reply, 

I forgot to mention that I had also done that, this is the questioned sections look like:

ti-davinci/linux-2.6.18_pro500/arch/arm/mach-davinci/mux_cfg.c

static const short dm365_uart0_pins[] = {

DM365_UART0_RXD, DM365_UART0_TXD,

-1

};

//The added section

static const short dm365_uart1_pins[] = {

DM365_UART1_RXD, DM365_UART1_TXD,

-1

};

......

static const short *dm365_pins[DAVINCI_LPSC_IMCOP + 1] = {

[DAVINCI_LPSC_PWM3] = dm365_pwm3_pins,

[DAVINCI_LPSC_MMC_SD0] = dm365_mmcsd0_pins,

[DAVINCI_LPSC_MMC_SD1] = dm365_mmcsd1_pins,

[DAVINCI_LPSC_I2C] = dm365_i2c_pins,

[DAVINCI_LPSC_AEMIF] = dm365_aemif_pins,

[DAVINCI_DM365_LPSC_McBSP] = dm365_mcbsp0_pins,

[DAVINCI_LPSC_PWM0] = dm365_pwm0_pins,

[DAVINCI_LPSC_PWM1] = dm365_pwm1_pins,

[DAVINCI_LPSC_PWM2] = dm365_pwm2_pins,

[DAVINCI_LPSC_UART0] = dm365_uart0_pins,

[DAVINCI_LPSC_UART1] = dm365_uart1_pins,

//[DAVINCI_DM365_LPSC_CPGMAC] = dm365_cpmac_pins,

[DAVINCI_LPSC_SPI] = dm365_spi0_pins,

};

I don't know where else to look anymore or what else to try. 

Any advise on the matter would be aprreciated.

Regards

Manfred

Hi Manfred,

Actually, i only use TX, with the same configuration as yours.
I think you can't use : MUX_CFG("UART1_TXD", 3,   15,    3,   2, 0)
since 3,15 is already used for EMAC clock. You have to find another  muxing,  or disable ethernet muxing.

Try just to remove DM365_UART1_RXD from  your dm365_uart1_pins[],  and  try if TX alone works (with 3,29):

On Leopard, i have the following differences from your code, and i use only TX :

//MUX_CFG("UART1_TXD", 3,   15,    3,   2, 0)
MUX_CFG("UART1_TXD", 3,   29,    3,   3, 0)

static const short dm365_uart1_pins[] = {
DM365_UART1_TXD,
-1
};

Also note that raw electrical signal on processor pin is not right, 
you have to add  RS232line driver/receiver  (like  TRS3221ECPWR), between processor pins and RS232 connector.

Regards,
Marko.

http://e2e.ti.com/support/embedded/f/354/p/85222/294017.aspx#294017

could you help me about this problem?

thx

dear marko

http://e2e.ti.com/support/embedded/f/354/p/85222/294017.aspx#294017

could you help me about this problem?

thx

Hi Jian,

To use  only  UART1  TX 
i am using another pin for TX, since default muxing for UART1 is used for ethernet.
It is (BGA ID=T1;  muxed with GIO25):

in mux_cfg.c :
//MUX_CFG("UART1_TXD", 3, 15, 3, 2, 0)  //default - used for ethernet BGA ID E1
MUX_CFG("UART1_TXD", 3, 29, 3, 3, 0)   //new one BGA ID=T1 (now connect to this one)static const short dm365_uart1_pins[] = { // Add this for UART1 TX
DM365_UART1_TXD, -1 };

and add it to :

static const short *dm365_pins[DAVINCI_LPSC_IMCOP + 1] = {
...
...
[DAVINCI_LPSC_UART1] = dm365_uart1_pins,
};

in board-dm365-evm.c

set uart1 clock to 121500000 in :

static struct plat_serial8250_port serial_platform_data[] = {
{
.membase = (char *) IO_ADDRESS(DAVINCI_UART0_BASE),
.mapbase = (unsigned long) DAVINCI_UART0_BASE,
.irq = IRQ_UARTINT0,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 24000000,
},
{
.membase = (char *) IO_ADDRESS(DM365_UART1_BASE),
.mapbase = (unsigned long) DM365_UART1_BASE,
.irq = IRQ_UARTINT1,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 121500000,//24000000,
},
{
.flags = 0
},
};

and disable SPI0 (comment it out) in:

static void board_init(void)
{
....
//davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, 0, DAVINCI_DM365_LPSC_SPI0, 1); // remove spi0,
     //(or only remove DM365_SPI0_SDENA0  pin from "dm365_spi0_pins[]")

But if you are going to use default muxed  UART1 pins, and you don't need ethernet, i think you can the remove some pins from
dm365_cpmac_pins[],
like EMAC_TX_CLK which is muxed with  UART1_TXD  (BGA ID =E1)

Regards, Marko.

thanks for your reply

i find in the dm365   UART1 RXD muxed GIO034, UART1 TXD muxed GIO025, while EMAC TXEN muxed GIO17, EMAC TXCLK muxed GIO16, so it seems that in my cpu, the EMAC and UART1 do not mux same pins, but the kernel file mux_cfg.c illustrate that they are muxed, so i think it is a bug.

could you tell me the following 5 numbers meaning 3 15 3 2 0?

MUX_CFG("UART1_TXD", 3,   15,    3,   2, 0)

and for the GIO034 GIO025, how to change the 5 parameters

thx

As far as i understand :
Look at SPRUFG5.pdf (from page 120) for pinmux register tables:    http://focus.ti.com/lit/ug/sprufg5a/sprufg5a.pdf
MUX_CFG(...
description :  (Field in Pinmux table)
mux reg     :  pinmux register (PINMUX0 = 0 to PINMUX4 = 4)
mode offset :  (bit) the bit position in pinmux register.
mode mask :    (value) which function is enabled for that pin

Look at arch/arm/plat-davinci/mux.c for other details.

Also make sure that in mux_cfg.c davinci_dm365_pinmux[] you keep the same order of MUX_CFG entries as specified in mux.h (enum davinci_dm365_index).

sorry, correct is

mux mode :    (value) which function is enabled for that pin  (not mode mask)

helo:

could you tell me what is the 6th character ,"dbg" mean in MUX_CFG,it's value is either '1' or '0'...

thank you very much!!

Hi enigma

as far as I remember it turns on a debug message in the kernel bootup procedure (dmesg) for each pin, 1 is on and 0 is off. If you turn all of them on, then you should see a same sequence of messages appear in the bootup sequence informing you of how the pins are setup. If not, then there may be a mistake in the config around the pin of the last message, thus it is great to determine errors in the MUX_CFG. I can't remember the exact wording of the debug messages, but if you turn enough of them on then you'll definitely spot them in the kernel message.

ok!!

thank you very much , Manfred~~!

Hi Marko

I am trying to get UART1 up on a LeopardBoard365. I'm finding it difficult to follow you as

I do not have a mux_cfg.c file and cant find anything similar to “dm365_uart0_pins[].

Can you please post instructions on how to get ttyS1 working.

Regards

Hi,

If you are using latest PSP release from http://processors.wiki.ti.com/index.php/DaVinci_(ARM9)_PSP_Releases, then the procedure to add the mux configurations has changed and they will be present in linux/arch/arm/mach-davinci/dm365.c file.

Regards, Sudhakar