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C6457 interrupts

Calum Mackinnon
Genius 4155 points

I have a customer with the following problem

We need your help for C6457 regarding GPIO 0/1 interrupt from HW. We could not see the EVENT signal after triggerring from HW in GPIO 0/1. Our project stacked at this point and we really appreciate if you can help with this issue ASAP, especially for the following questions

1. Why event 52 (GPINT1) wasn't set when GPINT1 interrupt occured?

2. In our DSP design, event 52 is hooked to interrupt vector ID 5. Event 52 can't trigger the interrupt but one of the event from 0 to 31 can trigger it. Why does this happen?

3. Using software interrupt, such as HPI DSP interrupt, event mapping works well. Is there any special settings in using hardware interrupt?

  • 0
    TI__Intellectual 910 points

    As long as the GPIO is toggled correclty, you should see the corresponding bit is set in the

    EVTFLAG1 register (address: 0180 0004)

     

     

    Have you confirmed that the bit in EVTFLAG1 is still 0 after GPIO is toggled?

    regards,

    ywu

  • 0 in reply to nmin Wu
    Prodigy 80 points

    Hi

    We have done following test for the GPIO1.
     
    1. Set GPIO1 as output and toggling, it is good, which confirm the HW OK
    2. But once set GPIO1 as input and trigerring with low pulse. we could not see any response in the EVTFLAG1. (The triggerring pulse: H=1.8V, L=0V, T=400nS)
     
     
    Please advice any special treatment for setting GPIO1 as input or any register settings will affect the EVTFLAG1 response.

    Thanks

    Guangyi Wang
  • 0 in reply to Guangyi Wang
    TI__Guru*** 125430 points

    Please post your setup code for review.  Did you configure for falling and/or rising edge interrupt?  Did you set the BINTEN bit?

    You might find this article helpful:

    http://processors.wiki.ti.com/index.php/Configuring_GPIO_Interrupts

  • 0 in reply to Brad Griffis
    Intellectual 290 points

    Following is our code for GPINT1 setup. We defined GPIO register addresses and directly set up the related fields without using API, while we use API to set up interrupt registers.

    Is there anything missing in our code?

    Thanks a lot!

     

    // Register address definition //

     

     

     

     

     

     

     

     

     

     

     

    #define

     

     

    #define

     

     

    #define

     

     

     INTC_INTMUX3_ADDR 0x0180010C\     INTC_INTMUX2_ADDR 0x01800108     INTC_INTMUX1_ADDR 0x01800104 // Interrupt mux

    #define

     

     

    GPIO_BINTEN 0x02b00008 //Interrupt Per-Bank enable register

    #define

     

     

    GPIO_DIR 0x02b00010 //Direction Register

    #define

     

     

    GPIO_SET_RIS_TRIG 0x20000024

    #define

     

     

    GPIO_CLR_RIS_TRIG 0x20000028

    #define

     

     

    GPIO_SET_FAL_TRIG 0x2000002C

    #define

     

     

    GPIO_CLR_FAL_TRIG 0x20000030

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

    // Setup GPINT1 interrupt

    // Interrupt events

    CSL_IntcEventHandlerRecord Record[128];

    contextIntc.numEvtEntries = 128;

    contextIntc.eventhandlerRecord = Record;

     

     

     

    // Reset interrupt event mux register

    *((

    volatile unsigned int*) INTC_INTMUX1_ADDR) = 0;

    *((

    volatile unsigned int*) INTC_INTMUX2_ADDR) = 0;

    *((

    volatile unsigned int*) INTC_INTMUX3_ADDR) = 0;

     

     

     

    // Initializes the CPU vector table, dispatchr

    intStat = CSL_intcInit(&contextIntc);

     

     

     

    // Enable NMIs

    intStat = CSL_intcGlobalNmiEnable();

     

     

     

    // Enable Global Interrupts

    intStat = CSL_intcGlobalEnable(&stateIntc);

     

     

     

    // Opening a handle for GPINT1 (event 52) onto CPU vector 5

    vectId = CSL_INTC_VECTID_5;

    intcGpio1Handle = CSL_intcOpen (&intcGpio1Obj, 52, &vectId ,

    NULL);

     

     

     

    // Bind ISR to GPINT1 Interrupt

    EventRecord.handler = (CSL_IntcEventHandler)&eventGpint1Handler;

    EventRecord.arg = (

    void *)intcGpio1Handle;

    CSL_intcPlugEventHandler(intcGpio1Handle, &EventRecord);

     

     

     

    // GPIO1 Event Enable

    CSL_intcHwControl(intcGpio1Handle, CSL_INTC_CMD_EVTENABLE,

    NULL);

     

     

     

    // Enable GPIO as interrupt pin

    *((

    volatile unsigned int*) GPIO_BINTEN) = 0x1;

     

     

     

    // Set GPIO0 and GPIO1 as input pins

    *((

    volatile unsigned int*) GPIO_DIR) = 0x3;

     

     

     

    // Disable GPIO0 and GPIO1 inpterrupts as rising trig

    *((

    volatile unsigned int*) GPIO_SET_RIS_TRIG) = 0x0;

     

     

     

    // Set GPIO0 and GPIO1 inpterrupts as falling trig

    *((

    volatile unsigned int*) GPIO_SET_FAL_TRIG) = 0x3;

  • 0 in reply to Ruifeng Wang
    TI__Guru*** 125430 points

    Have you enabled the corresponding interrupt in IER as well as NMIE and GIE?  I'm not very familiar with the INTC code.  Can you also do a register dump of your interrupt registers and your GPIO registers?

    Have you verified that when you change the state of the corresponding pin that you see it reflected in the IN register?

  • 0 in reply to Brad Griffis
    Prodigy 80 points

    Hi Brad

    What is the DC power supply for C6457 GPIO? Currently we use 1.8V.

     

    Thanks

     

    Guangyi

  • 0 in reply to Guangyi Wang
    TI__Guru*** 125430 points

    Guangyi Wang said:
    What is the DC power supply for C6457 GPIO? Currently we use 1.8V.

    Yes, it is 1.8V as shown in Table 6-4 "Power Supply to Peripheral I/O Mapping" of the data sheet.

  • 0 in reply to Brad Griffis
    Genius 4155 points

    Brad,

    Is there anyway you can give a step by step guide as to what registers need programmed and in what order to get a GPIO interrupt to be generated?

    Cheers

    Calum

  • 0 in reply to Calum Mackinnon
    TI__Guru*** 125430 points

    Calum Mackinnon said:

    Is there anyway you can give a step by step guide as to what registers need programmed and in what order to get a GPIO interrupt to be generated?

    That was the intent of this wiki article.  Is something missing or unclear?

  • 0 in reply to Brad Griffis
    Genius 4155 points

    It's not that unclear but the order in the wiki states

    1. Configure the GPIO pin as an input by writing 1 to its respective bit in the DIRxy register.
    2. Enable a rising edge and/or falling edge interrupt by writing to the appropriate bit in the SET_RIS_TRIGxy/SET_FAL_TRIGxy register.
    3. Enable the bank interrupt for the corresponding interrupt by writing to BINTEN.ENn where n is the bank number. Note: This step must be performed regardless of whether you're planning to ultimately use a "direct" interrupt or the "bank" interrupt. The ENn bit gates all interrupts from the GPIO module.

    The code posted above does not do it in this order - does it matter?

     

    Cheers

    Calum

  • 0 in reply to Calum Mackinnon
    TI__Guru*** 125430 points

    There is example code on that wiki page that does it this way.  The code posted above is from someone whose code doesn't work!

  • 0 in reply to Brad Griffis
    Genius 4155 points

    Brad,

    I know - that's what I'm getting at - is the order important?

    Cheers

    Calum

  • 0 in reply to Calum Mackinnon
    TI__Guru*** 125430 points

    I don't think so.  Are you also having issues getting interrupts firing on 6457?  Do you see IN_DATA reflecting the status of what's being applied on the pin?

    I'm not very familiar with the CSL3 code.  If you're using BIOS or doing low-level code I can probably help better.  Memory dumps of the peripheral registers is probably best anyway.

    Relevant registers

    • PSC registers (is GPIO enabled)
    • GPIO registers
    • INTMUX registers
    • Has interrupt vector table been plugged?

    Brad

  • 0 in reply to Brad Griffis
    TI__Guru*** 125430 points

    Are you guys still having issues?  If so, please post the registers I requested in the previous post.

    Brad Griffis said:
    • PSC registers (is GPIO enabled)
    • GPIO registers
    • INTMUX registers
    • Has interrupt vector table been plugged?

    Are you both working on the same issue or are you having 2 independent issues?

  • 0 in reply to Brad Griffis
    Genius 4155 points

    Brad,

    Sorry for not getting back - the customer has solved the problem. I'm not sure what the exact problem was.

    Cheers

    Calum

  • 0 in reply to Calum Mackinnon
    TI__Guru*** 125430 points

    Is Guangyi the customer?  If not, is your issue resolved too Guangy?

    Calum Mackinnon said:
    the customer has solved the problem. I'm not sure what the exact problem was.

    Will you please find out what the issue was?  I'm sure the info will help someone else at some point.

  • 0 in reply to Brad Griffis
    Intellectual 550 points

    At me the same problem. There is no interruption from GPIO. How to solve a problem?