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am1808 EDMA3 - when I can read buffer?

Thodin
Intellectual 300 points

DMA controller reads UART2 and puts bytes into ring buffer.

When UART2 receives a new byte, it sends UART2 RX EVENT to DMA, DMA writes received byte into ring buffer, increments DST and decrements BCNT parameters in PARAM set, associated with UART2 rx event field.

I check DST field in PARAM set. If DST was incremented, I read byte from the ring buffer. For example when DST was changed from 0xC0000000 to 0xC0000001, I read byte from 0xC0000000. Sometimes I read new received byte, sometimes old value. It means new value in the ring buffer appears after DST increment.

If I read buffer after small delay, for example read it twice and use the last value, I always get new received byte. But I'm not sure it's reliable method.

What else I should check before reading a new value from ring buffer?

 

  • 0
    TI__Mastermind 27585 points

    If you want to read every new byte received, you should use the Intermediate transfer completion interrupt (ITCINT), which will trigger once each byte is copied to the DDR in your case.

    If you want to reduce overhead you can use the Transfer Complete interrupt (TCINT) instead and read more bytes at once.

    Jeff

  • 0 in reply to jc-ti
    TI__Guru* 84005 points

    Thodin

    In addition to Jeff's response, I want to point out that the PaRAM values get updated some time between the transfer request packet is submitted from Channel Controller to Transfer controller, so an update on the DST parameter does not guarantee that the transfer bytes have landed in the destination memory. Therefore, as Jeff suggested the recommended path would be to set the transfer/intermediate transfer completion interrupt bits in the OPT field, and then poll for bit to be set or setup an interrupt on completion of transfer. FYI, checking status after every byte would likely be a lot of overhead.

    Regards

    Mukul

  • 0 in reply to Mukul Bhatnagar
    Intellectual 300 points

    I don't know how many bytes will be received from UART. So I can't use transfer completion interrupt for more than 1 byte. But DMA is useless if it interrupts CPU after each received byte. Is there any other sing which guarantee that the byte has landed in the destination memory? Maybe timeout after reading DST?

  • 0 in reply to Thodin
    TI__Guru* 84005 points

    Thodin said:
    But DMA is useless if it interrupts CPU after each received byte.

    The DMA can interrupt CPU as you want it to , for e.g. if you program the EDMA with ACNT=1 (1 char) , BCNT = 10 (number of bytes to transfers), CCNT=1, A SYNC mode, by setting ITCINTEN you can get an interrupt after every ACNT bytes (1 byte, intermediate transfer ) , by setting TCINTEN to 1, you will interrupt the CPU after 10 bytes (final transfer completion) , if you set both bits, you will get interrupts for all 10 bytes. Hope this makes sense?

     

  • 0 in reply to Mukul Bhatnagar
    Intellectual 300 points

    If I have prolonged critical sections with disabled interrupts, I can lose 1 or more intermediate transfer interrupts. In this case I'll not know how many bytes were received. But I also can't check BCNT or DST.