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Dra714 boot fail problem

shawn lin
Genius 3450 points
Other Parts Discussed in Thread: DRA714, LP8733, DRA722

Our processor is DRA714, with 3.02.00.03 SDK version.

In our custom board. we use TPS65917Q1 as our PMIC. We use SD boot(MMC1). As title, we have boot fail problem, there is no log output after power on. Our uboot dts file is =>  

uboot_dts.txt
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/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "dra71-evm.dts"
&pcf_gpio_21 {
status = "disabled";
};
&evm_3v3_sd {
gpio = <>;
};
&extcon_usb1 {
id-gpio = <>;
};
&extcon_usb2 {
id-gpio = <>;
};
/ {
chosen {
stdout-path = &uart4;
};
memory {
reg = <0x80000000 0x20000000>; /* 512 MB */
};
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
};
&dra7_pmx_core {
uart4_pins: pinmux_uart4_pins {
pinctrl-single,pins = <
0x33C (PIN_INPUT_SLEW | MUX_MODE4) /* uart4_rxd */
0x340 (PIN_INPUT_SLEW | MUX_MODE4) /* uart4_txd */
>;
};
};
/*=================== Add PMIC TPS65917 ==================*/
&i2c1 {
status = "okay";
clock-frequency = <400000>;
tps65917: tps65917@58 {
compatible = "ti,tps65917";
reg = <0x58>;
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
interrupt-controller;
#interrupt-cells = <2>;
ti,system-power-controller;
tps65917_pmic {
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
   

Here are our questions:


1.Currently, we think the problem could be wrong DDR parameter or PMIC setting, but how should i know which one is the root cause? Is there have any suggestion for us to check?

2.Where is the very first timing for our code can control gpio level?(we try to use gpio high/low level to idetify boot phase). Right now, we put some gpio high/low control at board_init_f() at board_f.c, but the gpio level never change.

3.For DRA714, which CPU frequency setting should we use(i.e. 1GHz)? And which file need to be modify(uboot & kernel)?  

Regards,


Shawn

  • 0
    TI__Intellectual 2460 points
    Hi,
    I am assuming your board has only changes that you had modified in your dts file.
    If you have any other changes, those pinmux need to be taken care.
    Can you please check that and let us know?
  • 0 in reply to Somnath Mukherjee
    Genius 3450 points
    Hi,

    Our pinmux setting is followed our HW layout, should not be the problem.
    Because PMIC is different with DRA71-evm(use lp8733 & lp8732, our custom board use tps-65917), so we think the problem should be PMIC setting.
    Now we still use dra71-evm.dts, and we add tps-65917 description at our dts file, but boot fail. Any suggestion for further debug?

    Regards,
    Shawn
  • 0 in reply to shawn lin
    Expert 1285 points
    Shawn

    Please try section 3.1.2 www.ti.com/.../sprac65a.pdf
    By JTAG you can watch and inspect if DRA7 is running

    Regards
  • 0 in reply to Christian N
    Genius 3450 points

    Currently, i force the return value of init_omap_revision()(this function is at u-boot/arch/arm/cpu/armv7/omap5/hwinit.c) to be "DRA722_ES2_0", there are some log info output =>

    8865.boot_log.txt
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    U-Boot SPL 2016.05-g35dae4d-dirty (May 15 2018 - 13:49:48)
    DRA722-GP ES2.0
    ti_i2c_eeprom_init failed 1
    925 -> optimize_vcore_voltage:efuse 0x4a003b20 bits=16 Vnom=925, using efuse value 925
    925
    1034 -> optimize_vcore_voltage:efuse 0x4a0025f4 bits=16 Vnom=1034, using efuse value 1034
    1034
    0 -> 0
    935 -> optimize_vcore_voltage:efuse 0x4a003b08 bits=16 Vnom=935, using efuse value 935
    935
    0 -> 0
    0 -> 0
    cor: 1034
    do_scale_vcore: volt - 1034 offset_code - 0x3c
    IODELAY: IO delay recalibration successfully completed
    mpu: 925
    do_scale_vcore: volt - 925 offset_code - 0x31
    mm: 0
    gpu: 935
    do_scale_vcore: volt - 935 offset_code - 0x32
    eve: 0
    iva: 0
    setup_dplls
    core Dpll already locked with idealnominal opp valuesCore DPLL configured
    per Dpll already locked with idealnominal opp valu�sPER DPLL locked
    mpu Dpll already locked with idealnominal opp valuesMPU DPLL locked
    usb Dpll already locked with idealnominal opp valuesBypassing DPLL failed 4a008180
    ddr Dpll already locked with idealnominal opp values
    gmac Dpll already locked with idealnominal opp values>>sdram_init()
    in_sdram = 0
    >>do_sdram_init() 4c000000
    MII 0 power strap setting(Pull low COL,CRSHW leveling success
    <<do_sdram_init() 4c000000
    SDRAM: identified size not same as expected size identified: 20000000 expected: 40000000
    enter here-2
    <<sdram_init()
    at board_init_f()
    board_init_f() done
    (spl.c).....board_init_r() done
    >>spl:board_init_r()
    TLB table from c0ffb000 to c1000000
    dram_bank_mmu_setup: bank: 0
    dram_bank_mmu_setup: bank: 1
    using memory 0x80a80000-0x81a80000 for malloc()
    spl_init()
    U-Boot SPL 2016.05-g35dae4d-dirty (May 15 2018 - 13:49:48)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
         

    But still stuck at u-boot. Any suggestion for further debug?

    This is the 3rd project of our customer to use J6, the schedule is urgent, so we need to fix this problem ASAP.

    P.S.1 I already enable debug message(i define DEBUG at u-boot/include/common.h).=> 

    common.h.txt
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    /*
    * (C) Copyright 2000-2009
    * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
    *
    * SPDX-License-Identifier: GPL-2.0+
    */
    #ifndef __COMMON_H_
    #define __COMMON_H_ 1
    #ifndef __ASSEMBLY__ /* put C only stuff in this section */
    typedef unsigned char uchar;
    typedef volatile unsigned long vu_long;
    typedef volatile unsigned short vu_short;
    typedef volatile unsigned char vu_char;
    #include <config.h>
    #include <asm-offsets.h>
    #include <linux/bitops.h>
    #include <linux/types.h>
    #include <linux/string.h>
    #include <linux/stringify.h>
    #include <asm/ptrace.h>
    #include <stdarg.h>
    #include <linux/kernel.h>
    #if defined(CONFIG_PCI) && defined(CONFIG_4xx)
    #include <pci.h>
    #endif
    #if defined(CONFIG_8xx)
    #include <asm/8xx_immap.h>
    #if defined(CONFIG_MPC859) || defined(CONFIG_MPC859T) || \
    defined(CONFIG_MPC866) || \
    defined(CONFIG_MPC866P)
    # define CONFIG_MPC866_FAMILY 1
    #elif defined(CONFIG_MPC885)
    # define CONFIG_MPC885_FAMILY 1
    #endif
    #if defined(CONFIG_MPC860) \
    || defined(CONFIG_MPC860T) \
    || defined(CONFIG_MPC866_FAMILY) \
    || defined(CONFIG_MPC885_FAMILY)
    # define CONFIG_MPC86x 1
    #endif
    #elif defined(CONFIG_5xx)
    #include <asm/5xx_immap.h>
    #elif defined(CONFIG_MPC5xxx)
    #include <mpc5xxx.h>
    #elif defined(CONFIG_MPC512X)
    #include <asm/immap_512x.h>
    #elif defined(CONFIG_MPC8260)
    #if defined(CONFIG_MPC8247) \
    || defined(CONFIG_MPC8272)
    #define CONFIG_MPC8272_FAMILY 1
    #endif
    #include <asm/immap_8260.h>
    #endif
    #ifdef CONFIG_MPC86xx
    #include <mpc86xx.h>
    #include <asm/immap_86xx.h>
    #endif
    #ifdef CONFIG_MPC85xx
    #include <mpc85xx.h>
    #include <asm/immap_85xx.h>
    #endif
    #ifdef CONFIG_MPC83xx
    #include <mpc83xx.h>
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
       

    P.2.2 I also add preloader_console_init() at u-boot/arch/arm/cpu/armv7/omap-common/hwinit-common.c to let u-boot can output log earlier.=> 

    hwinit-common.c.txt
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    /*
    *
    * Common functions for OMAP4/5 based boards
    *
    * (C) Copyright 2010
    * Texas Instruments, <www.ti.com>
    *
    * Author :
    * Aneesh V <aneesh@ti.com>
    * Steve Sakoman <steve@sakoman.com>
    *
    * SPDX-License-Identifier: GPL-2.0+
    */
    #include <common.h>
    #include <spl.h>
    #include <asm/arch/sys_proto.h>
    #include <linux/sizes.h>
    #include <asm/emif.h>
    #include <asm/omap_common.h>
    #include <linux/compiler.h>
    #include <asm/system.h>
    DECLARE_GLOBAL_DATA_PTR;
    void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
    {
    int i;
    struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
    for (i = 0; i < size; i++, pad++)
    writew(pad->val, base + pad->offset);
    }
    static void set_mux_conf_regs(void)
    {
    switch (omap_hw_init_context()) {
    case OMAP_INIT_CONTEXT_SPL:
    set_muxconf_regs();
    break;
    case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
    break;
    case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
    case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
    set_muxconf_regs();
    break;
    }
    }
    u32 cortex_rev(void)
    {
    unsigned int rev;
    /* Read Main ID Register (MIDR) */
    asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
    return rev;
    }
    static void omap_rev_string(void)
    {
    u32 omap_rev = omap_revision();
    u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
    u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
    u32 major_rev = (omap_rev & 0x00000F00) >> 8;
    u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
      

    Regards,

    Shawn

  • 0 in reply to shawn lin
    TI__Intellectual 2460 points
    Hi Shawn,
    I am wondering what value do you get from init_omap_revision(), if you don't force it to "DRA722_ES2_0"?
    It seems to me there may be still some PMIC configuration related issue.
    If you have been able to get started with first stage of U-boot, it may be that U-boot is failing to relocate to DDR. Because the DDR may not be powered-on yet. Just guessing, at this point time.

    Let's first find out about what's the original return value from init_omap_revision() and why did you need to change it by force!

    Thanks for your patience.
    Appreciate it.

    Regards,
    Somnath
  • 0 in reply to Somnath Mukherjee
    Genius 3450 points
    Hi Somnath,

    I will try to output the original return value from init_omap_revision(). But does debug message function work at that moment?

    Regards,
    Shawn
  • 0 in reply to shawn lin
    Expert 1285 points

    Shawn

    It is probably that terminal doesn't output at this time. To solve it simple, save the result and keep it in a global variable and print out it when terminal output is ready

  • 0 in reply to Christian N
    Genius 3450 points

    Hi Somnath,

    The value get from init_omap_revision() is 0x2b9bc02f, which is exactly the ID_CODE of DRA71x SR2.1.

    This ID_CODE doesn't show up at u-boot/arch/arm/include/asm/arch-omap5/omap.h. Does this mean the u-boot we used doesn't support DRA71X CPU?

    But there have some "dra71x" wording at evm.c, such as board_is_dra71x_evm(). It seems like the u-boot still support DRA71X CPU. I also see the latest SDK version 3.04.00.03 release notes say that it support DRA71x PG 2.1, what's different between PG2.1 and SR2.2? Is the latest version support DRA71x SR2.1?

    BTW, since out platform is use DRA714 + TPS-65917(PMIC), so i also modify PMIC setting at evm.c and dts file.

    At evm.c, i use dra722_volts for vcores_update() function.

    At dts, i include dra71-evm.dts, and i add tps-65917 description at our dts file => 

    0844.dts.txt
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    /*
    * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
    *
    * This program is free software; you can redistribute it and/or modify
    * it under the terms of the GNU General Public License version 2 as
    * published by the Free Software Foundation.
    */
    //#include "dra7-evm.dts"
    #include "dra71-evm.dts"
    //#include "dra72-evm.dts"
    &pcf_gpio_21 {
    status = "disabled";
    };
    &evm_3v3_sd {
    gpio = <>;
    };
    &extcon_usb1 {
    id-gpio = <>;
    };
    &extcon_usb2 {
    id-gpio = <>;
    };
    / {
    chosen {
    stdout-path = &uart4;
    };
    memory {
    reg = <0x80000000 0x20000000>; /* 512 MB */
    };
    };
    &uart4 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&uart4_pins>;
    };
    &dra7_pmx_core {
    uart4_pins: pinmux_uart4_pins {
    pinctrl-single,pins = <
    0x33C (PIN_INPUT_SLEW | MUX_MODE4) /* uart4_rxd */
    0x340 (PIN_INPUT_SLEW | MUX_MODE4) /* uart4_txd */
    >;
    };
    };
    &qspi {
    status = "okay";
    spi-max-frequency = <64000000>;
    m25p80@0 {
    compatible = "s25fl256s1","spi-flash";
    spi-max-frequency = <76800000>;
    reg = <0>;
    spi-tx-bus-width = <1>;
    spi-rx-bus-width = <4>;
    #address-cells = <1>;
    #size-cells = <1>;
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
          
     
    Hi ChristianN,

    Thanks for your help.

    Regards,
    Shawn

  • 0 in reply to shawn lin
    Genius 3450 points
    Hi Somnath,

    Any update?

    Regards,
    Shawn
  • 0 in reply to shawn lin
    TI__Intellectual 2460 points
    Hi Shwan,
    You wouldn't need to force change the ID code if you move to SDK - processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Release_Notes

    Can you please try with that?

    Regards,
    Somnath
  • 0 in reply to Somnath Mukherjee
    TI__Intellectual 2460 points
    Hi,
    Please let me know if you need any further help on this?
    If there's some other issue, please open a separate thread.

    Regards,
    Somnath
  • 0 in reply to Somnath Mukherjee
    TI__Intellectual 2460 points
    Hi,
    Can you please get back on this issue and let us know if you need any further help?

    Regards,
    Somnath
  • 0 in reply to Somnath Mukherjee
    Genius 3450 points
    Hi Somnath,

    Thanks for your reply.
    After i change u-boot to the latest SDK version(3.04.00.03), boot up successfully with include "dra72-evm-common.dtsi".

    Regards,
    Shawn