I need to send interlaced YCbCr data to the TI using the VIN0 bus. I cannot find a timing diagram which shows how hsync, vsync and data enable are used. And where in the SDK can you set the use of data enable because i have a working design for RGB where the data enable is tied low i.e. not used.
Also, can this TI chip handle 60 frames per second to do deinterlacing along with 4;2:2 to 4:4:4 and conversion to RGB at the full frame rate of 60fps.