THS8200 Sync defect

what is the specific problem you are seeing with the THS8200?

Tiger Team,

Thank you for the feedback; getting notifications when documents are updated is a great idea.  I am looking to see if we have such features available; otherwise, we will work with our internal teams to try and make this available to you.

With regards to the THS8200 compatibility, please note that timing specifications in the data-sheets (of both, DM6446 and THS8200) have not changed at all.  THS8200 is slightly incompatible with DM6446 due to incompatible sync timing requirements between the two parts.  Personally, I have seen it work despite this incompatibility; however, we cannot guarantee this interface will work all the time due to violation of the specifications.  There is nothing wrong with the silicon and both data-sheets (THS8200 and DM6446) still hold true, therefore no errata has been issued.  This incompatibility has always been present in the corresponding data-sheets. 

That said, Randy simply wanted to make this fact a little more clear and thus worked with out internal groups to add a statement in the THS8200 data-sheet to clarify this fact; again, nothing chaged, we simply added some clarification.

Let me know if this helps.

Juan, I do not understand your statement that the THS8200 timing specifications have not changed and that there is a "slight" incompatibility. This is a defect.

The documented specifications HAVE recently changed as was previously noted. The DC specifications in the april 2009 datasheet have removed the 1.8V sync setups and hlds times and now states "The HS_IN, VS_IN, and FID input setup/hold times are valid for 3.3-V I/O operation only. These sync inputs are not recommended for use with 1.8-V I/O logic levels."

In a related post ( http://e2e.ti.com/forums/p/5067/18820.aspx#18820 ) the following statements have been made:

• "may not meet all requirements for DM6446 with 1.8V interface ...  this may not work reliably with DM6446"

• "for a production design with the DM6446, you will want to refer to the new datasheet and may need to translate all the digital inputs up to 3.3V"

• "We have just posted an updated datasheet for the THS8200 that specifies HS_IN, VS_IN, and FID are to be used at 3.3V operation only"

This seems like more than a slight spec change and should warrant an errata so that TI  ODM/OEM customers are aware of a potential problem before they (and TI) are hit with field problems. I am releasing artwork this week and serendipidously found out about this at the 13th hour because of a different, but related THS8200 problem.

 Questions (For TI):

1) Was the THS8200 silicon qualified for operation at 1.8V across its operating environment? Were these signals in that qualification set? Have the original factory design resources been contacted and engaged?

2) If people are seeing problems in controlled lab environments, then this is not a question of showing up in the field .... it WILL!!! There are evidently no guardbands ...  which begs the question about all of the other signals at 1.8V operation over the temperature and humidity corners. Are their documented specifications valid and do they have any guardband?

3) Is TI sure about the root-cause? The clock polarity that the data is sampled on as noted by Jerry Johns in the related post seems like a plausible explanation -- "the clock polarity had been inverted such that the data bits and clock were both transitioning on the same edge - this gives almost no margin for the THS8200 to flop in the data".   As mentioned, there is no errata available on this issue/problem/concern/defect  so there is no data for anyone outside TI to fully understand to what degree the issue is fully identified and root-cause analyzed ... I could be all wet.

4) What is the sanctioned TI workaround to address this issue?

5) Is the THS8200 officially sanctioned and supported by TI for use with the DM644X and OMAP 1.8V devices in mid-high volume applications?

The last two are VERY  important. I understand that the timing problem may not usually show up in a controlled environment. If I was still in college and building up a couple dozen of these, This would not be a concern .. but I am targeting an application of 100K+ units. Physics and statistics always win in such higher volume applications.

This forum blog is probably not the ideal mechanism to resolve this and I will followup with my local FAEs (who had not been made aware of this either). The forum was instrumental in bringing up the potential issue and served its function. I really do thing that registered users of TI components should be proactively informed of any component issues and not be required to monitor forums though (which we all only inconsitently do in spurts as needed).

-- Gary

If it gives you any consolation Tiger team, the clock polarity switch has completely done away with my noisy video problems - this would mean that I have yet to see any problems with incompatible timings at 1.8V on this interface (since the original problem was not due to a problematic THS8200 but a faulty driver). Having said that, I am curious as to the potential ramifications of a 1.8V timing issue, since we are also targetting high volume applications with this chip. More importantly, I would like to know the specific test scenarios would induce a failure on that interface at that voltage. 

Jerry,

Regarding your earlier question ... The short answer is that I have not seen the problem ... I am trying to proactively keep it from becoming a problem in a new THS8200+DM6446 design ...

Last Saturday, two days before releasing the artwork, I was in an unrelated design review where someone that has successfully mated a THS8200 to an OMAP processor casually mentioned that there was a problem with the hsyncs and vsyncs where he had to take them AROUND the THS8200 and drive then directly from the OMAP.  This seems like it would introduce a group delay problem. I had been told several months ago by TI that the Davinci digital syncs were not syncronized with their analog DACS, but bypassing the THS8200 is slightly different. Evidently there is some intranal TI emails going around about this being a known limitation/issue.

So two days before releasing artwork I am in a tizzy because this is the first I had heard about this. No notification. No Errata. No nothing...

I looked at the THS8200 web page and say that the datasheet had changed in april. But I did not know WHAT changed as there was no errata or change log.

Then I sent a question in to the TI support desk (which I have not heard back from) and also remembered to look at the E2E support forum which lead me to the related thread.

I *think* the problem with the THS8200 being incompatible with certain VESA modes and having to be bypassed is a different problem than what these two threads are about ... but I dont know!  There is no errata and no customer accessible problem tracking system. I have no idea and have very limited time to give to finding out. So I am going to ask the local TI and distribution FAE support engineers to sort though all this.

(Jerry, I like your catch about the clocking edge polarity ... it would explain having no guardbands on the setup/hold. It crossed my mind that TI should make sure that they have found the root-cause and not a symptom. They will need to get the chip designers engaged to verify that though .. not sure that this forum will raise enough ruckus for that to happen though)

Jerry, our posts crossed...

Exactly. we need to have a TI sanctioned response to this whole THS8200 1.8V - vsync/hsync - VESA area.

It "feels" like there are three distinct symptoms here, not sure how/if they are related. The VESA incompatibility may have a different cause. They (TI) seems to know about this, but I have not gotten the details or seen it show up.

There HAS to be a problem issue tracking system somewhere. There HAS to be a way of disseminating that information to the ODM designers and OEMs.  I can not believe that a chip as old as the THS8200 has NO errata ??!? comeone, TI.

... for large volume customers. If something is not disclosed and swept under the rug, they will be making work for their own support organization and putting their customers out of business. While this forum is useful in bursts, I sure hope that TI is not counting on it being and replacing a formal support mechanism.

What I would like to see in the short run is for a TI forum moderator to find all THS8200 problems, issues, workarounds that can be shared with their ODM/OEM partners and find a way of getting that to us. (Same with all the TI components, I am just picking on the THS8200 because they seem to be holding things too close to the vest)

Tiger Team said:

Juan, I do not understand your statement that the THS8200 timing specifications have not changed and that there is a "slight" incompatibility. This is a defect.

The documented specifications HAVE recently changed as was previously noted. The DC specifications in the april 2009 datasheet have removed the 1.8V sync setups and hlds times and now states "The HS_IN, VS_IN, and FID input setup/hold times are valid for 3.3-V I/O operation only. These sync inputs are not recommended for use with 1.8-V I/O logic levels."  

Gary,

I may have jumped the gun here; my understanding was that nothing was removed from the THS specifications, just a comment added to clarify that setup/hold times are compatible with 3.3V IO interface.  I still see references to 1.8 V in THS8200 collateral, but was not aware any information regarding 1.8V was removed.  If this is the case, I will need to work with our internal teams to find out more details.

FYI, this incompatibility issues was only recently found by Randy (posted on forum) whie working with one of our customers.  I believe he drove the changes to the data-sheet so he is much more familiar than I am on this subject.  As you mentioned, THS8200 has been around for quite some time, and you can be assured that if the data-sheet states support for 1.8V, it has been characterized under these conditions.  You are also correct that when we find deviations from what is specified in our data-sheets, we issue erratas and a work-around  That said, becuase this issue was only recently found, we may be in the process of making these available.  Again, I was not aware that any 1.8V support was removed from data-sheet.  Working this thru your  local FAE may be the best way to go here...

Finally, I do agree customers should get updates and I will work to see if we can establish this.  I already have it on my list of things to do...

We do have an update mechansim for published changes that provides automatic updates

You would log in though the my.ti page and click on my.ti.com personal home page to take you to the next page

 Then go to this screen and go to the lines under my.ti account where it says email alerts, newsletters

 You then click on email alerts and choose the products you want to be alerted on