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C6748 VPIF loopback performance

Nori Shinozaki
Intellectual 2430 points
Hi,
There is a VPIF loopback sample code in pspdriver using FVID_exchange().
 
I'd like to know the max input and output performance in case of C6748 at the max MHz.
 
Is that pssible to achieve 320x240, 8bpp, 60fps for input, then to output the data at 30fps at a time?
 
Regards,
N.Shinozaki.
  • 0
    TI__Guru 62975 points

    I'm not familiar with the BIOS driver, but the capabilities of the hardware should be measured by pixel clock frequency.  The datasheet has the maximum pixel clock for VPIF spec'd at 75MHz.

    Your proposed input frame size * frame rate (320x240x60) places the pixel clock at under 5MHz, so it is ok.  With the same frame size your output pixel clock would be even slower, so that too is ok.

    -Tommy

  • 0 in reply to tlee
    TI__Intellectual 2430 points
    Thank you Tommy,
     
    We saw the inputs is Ok. with the setting, however the outputs drop some frames.
    It could be choked by DDR band width.
     
    We are using the same type of Aptina sensor as MT9T001 which is used in the sample code.
    In the sample code test with MT9T001, was there no frame drops?
     
    Regards,
    N.Shinozaki