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RTOS/TCI6630K2L: Executing Sysbios without GEL

Justin Shatto
Prodigy 100 points

Part Number: TCI6630K2L
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

I am attempting to execute a sysbios application on the arm core0 without using a GEL file, as I am writing a custom bootloader to load the application from NAND.

I have implemented the functionality of the GEL file in software, however in order for my sys/bios application to exuctue properly, I must always to a CPW (SW) reset before loading the .out file. 

If I do not run the software reset, the application produces an exeption and goes to address A08...........

What does the CPU (SW) reset button in code composer do? And How can I implement this in software?

  • 0
    TI__Mastermind 21025 points
    Hi Justin,

    You may want to post this question in the CCS forum.
  • 0 in reply to db_woodall
    Prodigy 100 points
    I have narrowed the problem down to the fact that when exiting the ROM bootloader the A15 Core zero comes up in non-secure mode SCR.NS = 1.

    In order for sysbios to execute properly the NSACR and ACTRL register need to be modifed in secure mode.

    In order to jump to secure mode I need to make a SMP call, but I do not have the MVBAR vector table set up, which also needs to be set up in secure mode. Is there something I need to set up in the BOOT parameter table to have the processor come up in secure mode?

    Using GEL reset or CPU reset (SW) from code composer puts the processor in secure mode, but when executing my bootloader from NAND puts my in the non-secure world