Part Number: AM4376
Hi Sir
we used latest SDK for development in AM437x platform and would like to do driver porting for RTL8201FI PHY.
PHY is connected to cpsw_emac0. and we modified the driver.
1. we found below issues
a. we measured the clock on MII1_TXCLK and MII1_RXCLK. And it was1.25MHz.
b.we plug in the cable and cannot detect the link. we read the register of phy and found link detect: no
2. below is the modified code and console message.
/*
* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* AM437x SK EVM */
/dts-v1/;
#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "TI AM437x SK EVM";
compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
aliases {
display0 = &lcd0;
serial3 = &uart3;
};
chosen {
stdout-path = &uart3;
tick-timer = &timer2;
};
backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
sound {
compatible = "ti,da830-evm-audio";
ti,model = "AM437x-SK-EVM";
ti,audio-codec = <&tlv320aic3106>;
ti,mcasp-controller = <&mcasp1>;
ti,codec-clock-rate = <24000000>;
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT";
};
matrix_keypad: matrix_keypad@0 {
compatible = "gpio-matrix-keypad";
pinctrl-names = "default";
pinctrl-0 = <&matrix_keypad_pins>;
debounce-delay-ms = <5>;
col-scan-delay-us = <5>;
row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
&gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
&gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
linux,keymap = <
MATRIX_KEY(0, 0, KEY_DOWN)
MATRIX_KEY(0, 1, KEY_RIGHT)
MATRIX_KEY(1, 0, KEY_LEFT)
MATRIX_KEY(1, 1, KEY_UP)
>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
/*pinctrl-0 = <&leds_pins>;*/
led@0 {
label = "am437x-sk:red:heartbeat";
gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
linux,default-trigger = "heartbeat";
default-state = "off";
};
led@1 {
label = "am437x-sk:green:mmc1";
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
linux,default-trigger = "mmc0";
default-state = "off";
};
led@2 {
label = "am437x-sk:blue:cpu0";
gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
linux,default-trigger = "cpu0";
default-state = "off";
};
led@3 {
label = "am437x-sk:blue:usr3";
gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
default-state = "off";
};
};
lcd0: display {
compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
label = "lcd";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
panel-timing {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <2>;
hback-porch = <2>;
hsync-len = <41>;
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};
&am43xx_pinmux {
matrix_keypad_pins: matrix_keypad_pins {
pinctrl-single,pins = <
0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
>;
};
/*Foxconn Rance modify to support UART3*/
uart3_pins: uart3_pins {
pinctrl-single,pins = <
0x228 (PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */
0x22c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
0x230 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */
0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
>;
};
i2c0_pins: i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: i2c1_pins {
pinctrl-single,pins = <
0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
>;
};
edt_ft5306_ts_pins: edt_ft5306_ts_pins {
pinctrl-single,pins = <
0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
>;
};
vpfe0_pins_default: vpfe0_pins_default {
pinctrl-single,pins = <
0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
>;
};
vpfe0_pins_sleep: vpfe0_pins_sleep {
pinctrl-single,pins = <
0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x108 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D16) mii1_col.gmii1_col */
0x10c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B14) mii1_crs.gmii1_crs */
0x110 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B13) mii1_rx_er.gmii1_rxer */
0x114 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (A13) mii1_tx_en.gmii1_txen */
0x118 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (A15) mii1_rx_dv.gmii1_rxdv */
0x12c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D14) mii1_tx_clk.gmii1_txclk */
0x130 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D13) mii1_rx_clk.gmii1_rxclk */
0x128 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (B15) mii1_txd0.gmii1_txd0 */
0x124 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (A14) mii1_txd1.gmii1_txd1 */
0x120 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (C13) mii1_txd2.gmii1_txd2 */
0x11c ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (C16) mii1_txd3.gmii1_txd3 */
0x140 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (F17) mii1_rxd0.gmii1_rxd0 */
0x13c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B16) mii1_rxd1.gmii1_rxd1 */
0x138 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (E16) mii1_rxd2.gmii1_rxd2 */
0x134 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (C14) mii1_rxd3.gmii1_rxd3 */
/* Slave 2 */
0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* (D16) mii1_col.gmii1_col */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* (B14) mii1_crs.gmii1_crs */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* (B13) mii1_rx_er.gmii1_rxer */
/* Slave 2 reset value */
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
dss_pins: dss_pins {
pinctrl-single,pins = <
0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
0x024 (PIN_OUTPUT | MUX_MODE1)
0x028 (PIN_OUTPUT | MUX_MODE1)
0x02c (PIN_OUTPUT | MUX_MODE1)
0x030 (PIN_OUTPUT | MUX_MODE1)
0x034 (PIN_OUTPUT | MUX_MODE1)
0x038 (PIN_OUTPUT | MUX_MODE1)
0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
0x0a4 (PIN_OUTPUT | MUX_MODE0)
0x0a8 (PIN_OUTPUT | MUX_MODE0)
0x0ac (PIN_OUTPUT | MUX_MODE0)
0x0b0 (PIN_OUTPUT | MUX_MODE0)
0x0b4 (PIN_OUTPUT | MUX_MODE0)
0x0b8 (PIN_OUTPUT | MUX_MODE0)
0x0bc (PIN_OUTPUT | MUX_MODE0)
0x0c0 (PIN_OUTPUT | MUX_MODE0)
0x0c4 (PIN_OUTPUT | MUX_MODE0)
0x0c8 (PIN_OUTPUT | MUX_MODE0)
0x0cc (PIN_OUTPUT | MUX_MODE0)
0x0d0 (PIN_OUTPUT | MUX_MODE0)
0x0d4 (PIN_OUTPUT | MUX_MODE0)
0x0d8 (PIN_OUTPUT | MUX_MODE0)
0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
>;
};
qspi_pins: qspi_pins {
pinctrl-single,pins = <
0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
>;
};
mcasp1_pins: mcasp1_pins {
pinctrl-single,pins = <
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
>;
};
lcd_pins: lcd_pins {
pinctrl-single,pins = <
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
>;
};
usb1_pins: usb1_pins {
pinctrl-single,pins = <
0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
>;
};
usb2_pins: usb2_pins {
pinctrl-single,pins = <
0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
>;
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <400000>;
tps@24 {
compatible = "ti,tps65218";
reg = <0x24>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
dcdc1: regulator-dcdc1 {
compatible = "ti,tps65218-dcdc1";
/* VDD_CORE limits min of OPP50 and max of OPP100 */
regulator-name = "vdd_core";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <1144000>;
regulator-boot-on;
regulator-always-on;
};
dcdc2: regulator-dcdc2 {
compatible = "ti,tps65218-dcdc2";
/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <1378000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3: regulator-dcdc3 {
compatible = "ti,tps65218-dcdc3";
regulator-name = "vdds_ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
dcdc4: regulator-dcdc4 {
compatible = "ti,tps65218-dcdc4";
regulator-name = "v3_3d";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ldo1: regulator-ldo1 {
compatible = "ti,tps65218-ldo1";
regulator-name = "v1_8d";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
power-button {
compatible = "ti,tps65218-pwrbutton";
status = "okay";
interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
};
};
at24@50 {
compatible = "at24,24c256";
pagesize = <64>;
reg = <0x50>;
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;
edt-ft5306@38 {
status = "okay";
compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
pinctrl-names = "default";
pinctrl-0 = <&edt_ft5306_ts_pins>;
reg = <0x38>;
interrupt-parent = <&gpio0>;
interrupts = <31 0>;
reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
touchscreen-size-x = <480>;
touchscreen-size-y = <272>;
};
tlv320aic3106: tlv320aic3106@1b {
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
status = "okay";
/* Regulators */
AVDD-supply = <&dcdc4>;
IOVDD-supply = <&dcdc4>;
DRVDD-supply = <&dcdc4>;
DVDD-supply = <&ldo1>;
};
lis331dlh@18 {
compatible = "st,lis331dlh";
reg = <0x18>;
status = "okay";
Vdd-supply = <&dcdc4>;
Vdd_IO-supply = <&dcdc4>;
interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
};
};
&epwmss0 {
status = "okay";
};
&ecap0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio5 {
status = "okay";
};
&mmc1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&dcdc4>;
bus-width = <4>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
/*foxconn Rance modify to support uart3*/
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&usb2_phy1 {
status = "okay";
};
&usb1 {
dr_mode = "peripheral";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&usb1_pins>;
};
&usb2_phy2 {
status = "okay";
};
&usb2 {
dr_mode = "host";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&usb2_pins>;
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qspi_pins>;
spi-max-frequency = <48000000>;
m25p80@0 {
compatible = "mx66l51235l","spi-flash";
spi-max-frequency = <48000000>;
reg = <0>;
spi-cpol;
spi-cpha;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
/* MTD partition table.
* The ROM checks the first 512KiB
* for a valid file to boot(XIP).
*/
partition@0 {
label = "QSPI.U_BOOT";
reg = <0x00000000 0x000080000>;
};
partition@1 {
label = "QSPI.U_BOOT.backup";
reg = <0x00080000 0x00080000>;
};
partition@2 {
label = "QSPI.U-BOOT-SPL_OS";
reg = <0x00100000 0x00010000>;
};
partition@3 {
label = "QSPI.U_BOOT_ENV";
reg = <0x00110000 0x00010000>;
};
partition@4 {
label = "QSPI.U-BOOT-ENV.backup";
reg = <0x00120000 0x00010000>;
};
partition@5 {
label = "QSPI.KERNEL";
reg = <0x00130000 0x0800000>;
};
partition@6 {
label = "QSPI.FILESYSTEM";
reg = <0x00930000 0x36D0000>;
};
};
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <4>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
&elm {
status = "okay";
};
&mcasp1 {
pinctrl-names = "default";
pinctrl-0 = <&mcasp1_pins>;
status = "okay";
op-mode = <0>;
tdm-slots = <2>;
serial-dir = <
0 0 1 2
>;
tx-num-evt = <1>;
rx-num-evt = <1>;
};
&dss {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dss_pins>;
port {
dpi_out: endpoint@0 {
remote-endpoint = <&lcd_in>;
data-lines = <24>;
};
};
};
&rtc {
status = "okay";
};
&wdt {
status = "okay";
};
&cpu {
cpu0-supply = <&dcdc2>;
};
&vpfe0 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&vpfe0_pins_default>;
pinctrl-1 = <&vpfe0_pins_sleep>;
/* Camera port */
port {
vpfe0_ep: endpoint {
/* remote-endpoint = <&sensor>; add once we have it */
ti,am437x-vpfe-interface = <0>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
U-Boot SPL 2017.01-00458-gccd1c34-dirty (May 08 2018 - 13:26:05) Trying to boot from MMC1 SPL: Please implement spl_start_uboot() for your board SPL: Direct Linux boot not active! reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2017.01-00458-gccd1c34-dirty (May 08 2018 - 13:26:05 +0800) CPU : AM437X-GP rev 1.2 Model: TI AM437x SK EVM DRAM: 1 GiB PMIC: TPS65218 NAND: 0 MiB MMC: OMAP SD/MMC: 0 reading uboot.env ** Unable to read "uboot.env" from mmc0:1 ** Using default environment Net: <ethaddr> not set. Validating first E-fuse MAC Could not get PHY for cpsw: addr 4 cpsw, usb_ether Hit any key to stop autoboot: 0 => mii info 0 PHY 0x00: OUI = 0x0732, Model = 0x01, Rev = 0x06, 10baseT, HDX => mii info 1 PHY 0x01: OUI = 0x0732, Model = 0x01, Rev = 0x06, 10baseT, HDX => mii dump 0 0 0. (1000) -- PHY control register -- (8000:0000) 0.15 = 0 reset (4000:0000) 0.14 = 0 loopback (2040:0000) 0. 6,13 = b00 speed selection = 10 Mbps (1000:1000) 0.12 = 1 A/N enable (0800:0000) 0.11 = 0 power-down (0400:0000) 0.10 = 0 isolate (0200:0000) 0. 9 = 0 restart A/N (0100:0000) 0. 8 = 0 duplex = half (0080:0000) 0. 7 = 0 collision test enable (003f:0000) 0. 5- 0 = 0 (reserved) => mii dump 0 1 1. (7849) -- PHY status register -- (8000:0000) 1.15 = 0 100BASE-T4 able (4000:4000) 1.14 = 1 100BASE-X full duplex able (2000:2000) 1.13 = 1 100BASE-X half duplex able (1000:1000) 1.12 = 1 10 Mbps full duplex able (0800:0800) 1.11 = 1 10 Mbps half duplex able (0400:0000) 1.10 = 0 100BASE-T2 full duplex able (0200:0000) 1. 9 = 0 100BASE-T2 half duplex able (0100:0000) 1. 8 = 0 extended status (0080:0000) 1. 7 = 0 (reserved) (0040:0040) 1. 6 = 1 MF preamble suppression (0020:0000) 1. 5 = 0 A/N complete (0010:0000) 1. 4 = 0 remote fault (0008:0008) 1. 3 = 1 A/N able (0004:0000) 1. 2 = 0 link status (0002:0000) 1. 1 = 0 jabber detect (0001:0001) 1. 0 = 1 extended capabilities => mii dump 0 2 2. (001c) -- PHY ID 1 register -- (ffff:001c) 2.15- 0 = 28 OUI portion => mii dump 0 3 3. (c816) -- PHY ID 2 register -- (fc00:c800) 3.15-10 = 50 OUI portion (03f0:0010) 3. 9- 4 = 1 manufacturer part number (000f:0006) 3. 3- 0 = 6 manufacturer rev. number => mii dump 0 4 4. (01e1) -- Autonegotiation advertisement register -- (8000:0000) 4.15 = 0 next page able (4000:0000) 4.14 = 0 (reserved) (2000:0000) 4.13 = 0 remote fault (1000:0000) 4.12 = 0 (reserved) (0800:0000) 4.11 = 0 asymmetric pause (0400:0000) 4.10 = 0 pause enable (0200:0000) 4. 9 = 0 100BASE-T4 able (0100:0100) 4. 8 = 1 100BASE-TX full duplex able (0080:0080) 4. 7 = 1 100BASE-TX able (0040:0040) 4. 6 = 1 10BASE-T full duplex able (0020:0020) 4. 5 = 1 10BASE-T able (001f:0001) 4. 4- 0 = 1 selector = IEEE 802.3 => mii dump 0 5 5. (0001) -- Autonegotiation partner abilities register -- (8000:0000) 5.15 = 0 next page able (4000:0000) 5.14 = 0 acknowledge (2000:0000) 5.13 = 0 remote fault (1000:0000) 5.12 = 0 (reserved) (0800:0000) 5.11 = 0 asymmetric pause able (0400:0000) 5.10 = 0 pause able (0200:0000) 5. 9 = 0 100BASE-T4 able (0100:0000) 5. 8 = 0 100BASE-X full duplex able (0080:0000) 5. 7 = 0 100BASE-TX able (0040:0000) 5. 6 = 0 10BASE-T full duplex able (0020:0000) 5. 5 = 0 10BASE-T able (001f:0001) 5. 4- 0 = 1 selector = IEEE 802.3
please advise and thanks for your help
BR
Yimin
