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AMIC110: EtherCAT PDI digital I/O

Wang Wei
Prodigy 240 points
Part Number: AMIC110


Hi:

Our previous product use the beckhoff ET1100 to do the I/O control including 16bits output and 16bits input.

According to beckhoff's manual, they implement this function with default PDI digital I/O,which output value are written to the register 0x0F00:0x0F03.

Now,we will use the AMIC110 to replace the old product, but it has to be compatible with the old versions, namely, we have to use the 0x0F00:0x0F03 to hold the EtherCAT output values.

But the question is that, if we configure the new .xml file like this way(consistent with beckhoff's .xml file): 

"<Sm DefaultSize="4" StartAddress="#x0f00" ControlByte="#x64" Enable="1">Outputs</Sm>

<Sm DefaultSize="4" StartAddress="#x1002" ControlByte="#x20" Enable="1">Inputs</Sm>"

we can't even make the EtherCAT work.

So, my question is that:

1. if AMIC110 support PDI digital I/O mode?

2. if not, whether there's a way to make the new product be compatible with the old versions?(besides,we ues your demo project "ethercat_slave_full_AMIC11x_arm" to develop out product).

best regards!

thank you!

  • 0
    TI__Guru**** 393215 points
    The RTOS team have been notified. They will respond here.
  • 0 in reply to Biser Gatchev-XID
    TI__Mastermind 43296 points
    Hi Wei,

    After updating the SM 2/3 startAddress in the ESI XML file, did you follow the section 'Generating ESI Header file From ESI xml' in the wiki (processors.wiki.ti.com/.../PRU_ICSS_EtherCAT to generate new ESI header file and re-build your project?

    Regards,
    Garrett
  • 0 in reply to Garrett Ding
    Prodigy 240 points
    thank you for your reply!
    I have followed your suggest, updating the ESI header file and rebuild my project ,but the result is same as before.
    The ESC state machine's state can't change to SAFEOP, the error code shows that there is something wrong with the SM configuration.
    What can i do next?
    best regards!
  • 0 in reply to Wang Wei
    TI__Mastermind 43296 points
    Hi,

    >>the error code shows that there is something wrong with the SM configuration.
    Can you post the log with error code here?

    Regards,
    Garrett
  • 0 in reply to Garrett Ding
    Prodigy 240 points
    The error log is:
    1.'PREOP to SAFEOP' failed! Error: 'check device state for SAFEOP'. AL Status '0x0012' read and '0x0004' expected. AL Status Code '0x001d - Invalid SM OUT cfg'
    2.state change aborted (requested 'SAFEOP', back to 'PREOP').
    Regards!
  • 0 in reply to Wang Wei
    TI__Mastermind 43296 points

    Wei,

    There are several checks for the SM configuration in EtherCAT stack. You need to update the MIN_PD_WRITE_ADDRESS defined in ecat_def.h for SM2 to resolve the '0x001d- Invalid SM OUT cfg' when you change the SM2 address from 0x1800 to 0x0f00.

    Also 0x1002 for SM3 overlaps the SM0 mailbox address 0x1000, so you need to update the SM0 address as well.

    The following code changes is for your reference, and should get the device to OP with your expected SM2/SM3 addresses.

    1.

    MIN_PD_WRITE_ADDRESS: Minimum address for the process output data (Sync Manager 2)<br>

    inside the application memory of the EtherCAT Slave Controller which could be set by the master. The setting have to be within the ranges of the user memory of the ESC (this is not checked by the tool). */

    #ifndef MIN_PD_WRITE_ADDRESS

    #define MIN_PD_WRITE_ADDRESS                      0x0F00

    #endif

    2.  

    <Sm MinSize="34" MaxSize="256" DefaultSize="128" StartAddress="#x1200" ControlByte="#x26" Enable="1">MBoxOut</Sm>

    <Sm MinSize="34" MaxSize="256" DefaultSize="128" StartAddress="#x1600" ControlByte="#x22" Enable="1">MBoxIn</Sm>

    <Sm DefaultSize="5" StartAddress="#x0F00" ControlByte="#x64" Enable="1">Outputs</Sm>

    <Sm DefaultSize="7" StartAddress="#x1002" ControlByte="#x20" Enable="1">Inputs</Sm>

    Regards,

    Garrett

  • 0 in reply to Garrett Ding
    Prodigy 240 points
    Hi,Garrett!
    Thanks for your tutorial. I have carefully made all the changes according to your suggest, but the EtherCAT still doesn't work.
    These steps have been done in my debug:
    1. adjust .xml file according your suggest:
    <Sm MinSize="34" MaxSize="256" DefaultSize="128" StartAddress="#x1200" ControlByte="#x26" Enable="1">MBoxOut</Sm>

    <Sm MinSize="34" MaxSize="256" DefaultSize="128" StartAddress="#x1600" ControlByte="#x22" Enable="1">MBoxIn</Sm>

    <Sm DefaultSize="5" StartAddress="#x0F00" ControlByte="#x64" Enable="1">Outputs</Sm>

    <Sm DefaultSize="7" StartAddress="#x1002" ControlByte="#x20" Enable="1">Inputs</Sm>
    2. follow the insturction 'Generating ESI Header file From ESI xml' to generate new ESI header file and re-build my project.
    3. adjust the "ecat_def.h" file:
    #ifndef MIN_PD_WRITE_ADDRESS

    #define MIN_PD_WRITE_ADDRESS 0x0F00

    after these work, I test my slave on two kind of master platform:
    1. TwinCAT3
    On TwinCAT3, it won't report error any more, but when I put the output value on the EtherCAT, the slave still doesn't work.
    2.Codesys
    On Codesys, it will report error with code"16#00", I checked that it corresponds to "no error", but the EtherCAT doesn't work.

    Besides, if I use the same .xml file which adjusted as said above with the beckhoff ET1100 edition. It will work well.
    I'm very confused about these results.
  • 0 in reply to Wang Wei
    TI__Mastermind 43296 points
    Hi Wei,

    >>when I put the output value on the EtherCAT, the slave still doesn't work.
    Do you mean the slave is in OP state but you don't see expected data in the address 0x0F00? or you are not able to see the data in sDOOutputs (referring to tiescappl.h)?

    Regards,
    Garrett
  • 0 in reply to Garrett Ding
    Prodigy 240 points
    Hi Garrett,
    yes, I can't see the data in "sDOOutputs" and more specifically, the "bEcatFirstOutputsReceived" has never been set to "true". But the "sDIInputs" works properly.

    Regards,
    Wei
  • 0 in reply to Wang Wei
    TI__Mastermind 43296 points
    Hi Wei,

    It appears PRU firmware update is required to enable MIN_PD_WRITE_ADDRESS less than 0x1000. Currently the PRU firmware prevents SM from accessing address lower than 0x1000. Is it only because of the ET1100 register compatibility consideration, you wanted to use the SM2 address 0x0F00? As you are still trying to get the output data from sDOOutputs, it doesn't seem you have to concern the internal SM address using 0x0F00 or 0x1000. What would be broken if your new design is not compatible with the ET1100 0x0F00 register?

    Regards,
    Garrett
  • 0 in reply to Garrett Ding
    Prodigy 240 points
    Hi Garrett,
    Thanks for your information!
    In our original design, these two editions have the same product name and appearance, our customers can use both of these editions without any extra adjustment.
    Annoyingly, the ET1100 has to use the 0x0F00 register to hold the output value. So, if our new products with AMIC110 can't use this register , we have to offer a new ESI file to our customer. And if a customer buys both of these two editions, when he finds that the product doesn't work properly after replacing one with another, he has to check the ESI file. It's not convenient.
    So, it seems that we have to change the product name or appearance with our new design. However, these two editions both have the same function but with different name or appearance and ESI file, it's a little odd.
    That's why we try to make the ESI file compatible with both editions.

    Best Regards,
    Wei
  • 0 in reply to Wang Wei
    TI__Mastermind 43296 points
    Hi Wei,

    It's not a trivial change in firmware to support the SM address lower than than 4K (0x1000) region. Since the incompatibility of SM address does not have impact in functionality, we don't plan to release another set of firmware. We will add the exception in the wiki - processors.wiki.ti.com/.../Sitara_TI_ESC_Exceptions

    Thanks,
    Garrett