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OMAP-L137: Syncing ADC and DSP when both units are isolated from each other

EE_MT
Intellectual 390 points

Hello,

I'm having a bit of trouble syncing the ADC and the DSP. The DSP is on the non-isolated side of the board and the ADC is on the isolated side of the board. The sides are separated by digital opto-couplers. For noise reasons, I am not able to put the DSP on the isolated side of the board. 

The DSP sends the clock and the sync signals across the digital opto-couplers and triggers the ADC to send its data bits back across the digital opto-coupler to the DSP. The problem that I'm encountering is that the propagation delay through the digital opto-couplers is too long. The isolation scheme adds almost a full bit time and the DSP saw all the data shifted by a bit or two, with at least one bit lost completely. 

I then tried sending the data and clock across the opto-coupler to the ADC, and then sent two signals back across the opto-coupler with the data to the DSP, so that everything was delayed, and had the DSP sync to the incoming clock, instead of the outgoing clock. This solution, mostly worked. 

Is there an easier way to sync these signals?

Thanks

  • 0
    TI__Guru 65405 points
    The team is notified. They will post their feedback directly here.

    BR
    Tsvetolin Shulev
  • 0 in reply to Cvetolin Shulev-XID
    Intellectual 390 points

    Hi Tsvetolin, 

    Is there an update to this question?

  • 0 in reply to EE_MT
    TI__Mastermind 28015 points
    EE_MT, could you provide more details on the setup? Which interface? Speed? ADC? - Thanks
  • 0 in reply to EE_MT
    TI__Mastermind 30110 points

    Hello,

    Ideally, you could solve this problem by having the ADC source the clock and frame sync with its data. This way, all clock, frame sync, and data input signals are delayed equally trough the optocouplers. Does your ADC support driving the clocks? Is there any other device, like a DAC, that can drive these clocks on the isolated side of the optocouplers?

    So you have tried looping back the clock and framesync from ACLKX and AFSX through the optocouplers back into ACLKR and AFSR?
    What problems are you having with this approach? You say it mostly worked.

    You might try playing with first-bit data delay: 0, 1, 2 bit clocks
    The RDATDLY bit field in the Receive Bit Stream Format Register (RFMT) register has three settings:
    0 0-bit delay. The first receive data bit, AXR[n], occurs in same ACLKR cycle as the receive frame sync (AFSR).
    1h 1-bit delay. The first receive data bit, AXR[n], occurs one ACLKR cycle after the receive frame sync (AFSR).
    2h 2-bit delay. The first receive data bit, AXR[n], occurs two ACLKR cycles after the receive frame sync (AFSR).

    Refer to the TRM: http://www.ti.com/lit/ug/spruh92d/spruh92d.pdf 

    Hope this helps,
    Mark