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TMS320C5517: Maximum MMACs is 400 MMACs

Part Number: TMS320C5517


I'm Don from Viet Nam.

I'm using kit DSP EVM5517. When reading datasheet of chip TMS320C5517, I 've seen that MMACs of DSP is up to 450 MMACs in section Device Overview. However, in section 5.2, Maximum DSP operating frequency is 200 MHz, so max MMACs = 2 x 200 =400 MMACs. That can't be up to 450 MMACs.

In addition, in section 2.3 of document spruh16b: TMS320C5517 Digital Signal Processor Technical Reference, it wrote that: "Dual MAC, C55x v3.x CPU 1.05 V @ 75 or 100 MHz, 1.3 V @ 175 or 200 MHz, 1.4 V @ 200 or 225 MHz".

It is so many conflict, isn't it? I am confused.

Please help me understand this issuse. Thank you.

Best regard,
Don Nguyen

  • Hi,

    See Section 7.1.2 Device Nomenclature in the Datasheet. It states that C5517 devices maximum frequency is 200MHz, so you can submit a documentation feedback using the link "Submit Documentation Feedback" at the bottom of each Technical Reference Manual.

    Best Regards,
    Yordan
  • Thank you, Yordan

    Best Regards,

    Don

  • I submitted feedback but I didn't receive any replies about max MMAC of TMS320C5517. I need to know how can be dual MAC operated at 450 MMACs with maximum frequency 200MHz which is written in document SPRS727C, page 1?
  • Hi Don,

    You are correct, max MMACs = 2 x 200 =400 MMACs.

    Before its official release, the C5517 supported a SYSCLK frequency of 225MHz. But now it supports upto 200MHz. Refer to the C5517 datasheet section 2 Revision History: "Removed 225-MHz device information."

    The MMACs number for C55xx devices is always 2x the SYSCLK frequency number, since the device core has a dual-MAC architecture where two Multiplies-and-Accumulate instructions can be performed per clock cycle (in parallel).

    The datasheet should read...
    "1.1 Features
    * Core
    – High-Performance, Low-Power, TMS320C55x Fixed-Point Digital Signal Processor
    * 13.33- to 5-ns Instruction Cycle Time
    * 75- to 200-MHz Clock Rate
    * One or Two Instructions Executed per Cycle
    * Dual Multiply-and-Accumulate Units (Up to -450- 400 Million Multiply-Accumulates per Second [MMACS])"...

    SPRUH16b should read...
    "Dual MAC, C55x v3.x CPU 1.05 V upto 75MHz, 1.3 V upto 175 MHz, 1.4 V upto 200 MHz"

    These voltage and maximum SYSCLK frequencies match what is published in the datasheet 5.2 Recommended Operating Conditions (FSYSCLK row).

    We apoligize for this mistake in the documentation. Thank you for bring it to our attention. I have submitted two LitBugs to ensure the next release corrects these mistakes.

    Regards,
    Mark

  • Thank you so much, Mark.

    Best regard,
    Don