Part Number: AM3352
For a first meemory access the gpmc interface is configured asynchornous, multiplexed, 16bit databus, cycletime 100ns. This is done due to the following register contens
GPMC_CONFIG1_1, 0x00601200
GPMC_CONFIG2_1, 0x000A0A00
GPMC_CONFIG3_1, 0x00030302
GPMC_CONFIG4_1, 0x0A030A05
GPMC_CONFIG5_1, 0x00090A0A
GPMC_CONFIG6_1, 0x080301C0
GPMC_CONFIG7_1, 0x00000F41
Using this configuration memory access is successfull.
Becaus the memory can be reconfigured to work a bit faster the internal register of the memory are reconfigured to "fast mode".
Then the GPMC_nCS1 ist disabled --> GPMC_CONFIG7_1, 0x00000F01
After disabling the GPMC_nCS1 the content of registers gpmc_contig1 to gpmc_config 7 are filled with new content.
GPMC_CONFIG1_1, 0x00601200
GPMC_CONFIG2_1, 0x00060600
GPMC_CONFIG3_1, 0x00010100
GPMC_CONFIG4_1, 0x06020601
GPMC_CONFIG5_1, 0x00060606
GPMC_CONFIG6_1, 0x060301C0
The gpmc_ncs1 is enabled again --> GPMC_CONFIG7_1, 0x00000F41
Next is to verify the interface is working by reading a constant register of the meory device. In 5% - 10% of this "dummy reads" we run to a data abord.
Is there something like a enbale to active time to be used?
