On hand I have both an ADS5482EVM and TMDXEVM6657L which I want to use for performance evaluation as core components in a new product design.
Direct interconnect of these two using the 6657's universal Parallel Port is not possible due to the DDR data rate limitations of the 6657. So I understand I need to put an Intervening device with local storage to act as a FIFO to buffer data from the ADS headed to the TMS.
TI TMS320C6657 (running at 1.25 GHz) uPP interface (x8 or x16 width)
- Limits uPP DDR to 26.66ns (37.5MHz) RxClock
- Limits uPP SDR to 13.33ns (75.0MHz) RxClock
TI ADS5482 provides 16bit data at x8 width DDR running at
- ADS5482 = 105MHz
I see TI offers a number of TSW devices such as the TSW1200, TSW1400, etc... It seems like one of these would be a natural candidate to "tweak" for the role of connecting my two existing EVMs.
I am capable of both hardware design and FPGA code development so making tweaks to an existing TSW looks like a fast path for me.
Do YOU have any Recommendations on an existing TI EMV (TSWxxx???) that would be suitable to this?
Many thanks!
