Hello!
My team and I are thinking about using the 66AK2L06 in order to accelerate FFTs in our application and we had a few questions about the device,
1. How many devices per JESD lane can be operated?
The data sheet lists that the Digital Front End (DFE) subsystem has 2 JESD204A/B controllers, each having two lanes for a total of 4 lanes. How many devices can each of these lanes support? We've been hard-pressed to find clear and explicit information about this in JESD information packets.
EDIT 1: It turns out, the right question to ask is how many lanes you will need for converter device! I've calculated this out with some help from a few blog posts and slides from AD, this questions is resolved. :)
2. Can the device operate a DMA line straight to the JESD interface?
To clarify, how would we go about transmitting data stored in RAM (OSR)?
EDIT 3: I see that the OSR is a Slave on the TeraNet (TeraNet 3_C), which I presume can be DMA'd using the EDMA CC0 as a Master. This Packet DMA can forward the data straight to the IQN2 which can then be piped out to the SERDES via the AID bus from IQN2 to the DFE.
3. Where can we find more information about the MSMC?
Our question pertains to analyzing the degree of control we have over the ARM core caches and the latencies associated with the transfer from the TeraNet to the MSMC to the ARM core cache.
4. How can we perform efficient maximum operations using the C66 DSP cores in the device?
On an unsorted array, could we utilize the DMAX instructions within the DSP ISA to find the max / argmax of the array faster than the ARM cores?
5. Where could we find more specific information on the TeraNet (version and architecture) in the device?
We have concerns about the degree of data movement concurrency possible and which peripherals are independent in the net. Can the DMA in the MultiCore Navigator allow us to bypass the TeraNet? What is the best solution to continuously pipe data between the FFT coprocessors, the C66 cores, and the ARM cores?
6. Is there an inter-device interface to "daisy chain" multiple 66AK2L06 devices together on the same board?
EDIT 2: It seems like this is possible via the Hyperlink feature of the TeraNet on all Keystone II architectures, although the 66AK2L06 Datasheet does not include any information on this. Would like some clarification if the Hyperlink feature exists on the TeraNet of the 66AK2L06!