Hi,
I was wondering if there exists a linker command file for the stand-alone single-core chip C674x that I could readily use. Of course, it's not that hard to write one myself. But I'm a little confused by the TMS320C6745/6747 datasheet (SPRS377d).
What's confusing is that there are two different physical addresses for L1P/L1D and L2 RAM. For example, in Table 3-4. C6747 Top Level Memory Map, the memory space 0x0080,0000 ~ 0x0083,FFFF is reserved for DSP L2 RAM, but the space 0x1180,0000 ~ 0x1183,FFFF is also used for DSP L2 RAM. Why is it like this? Which address should I use for L2 RAM? The same question also applies to L1D and L1P memory/cache.
I also need to understand more about the DSP memo map vs EDMA mem map. How are these two related? How to configure the chip so that I can be sure of which mem map I am using?
Thanks,
-Robby