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TIDL host mulation log

Hi,

Here is a log of TIDL 01.00.00.00 testvector running in host emulation. Its configuration file is tidl_config_jseg21_tiscapes.txt.

What is meaning of each column for (1) - (11) ?
I could not find the explanation in doc.

---
Processing config file ..\testvecs\config\infer\tidl_config_jseg21_tiscapes.txt !
  ...
 Layer    1 : Max PASS :    15301 :    15301 Out Q :      254 ,    43861, TIDL_BatchNormLayer, PASSED  #MMACs =     1.57,     0.00,     1.57, Sparsity :   0.00, 100.00
 Layer    2 : Max PASS :    45516 :    45516 Out Q :    17037 ,    45694, TIDL_ConvolutionLayer, PASSED  #MMACs =   314.57,   106.95,   121.63, Sparsity :  61.33,  66.00
 Layer    3 : Max PASS :    26380 :    26380 Out Q :     9253 ,    26483, TIDL_ConvolutionLayer, PASSED  #MMACs =   301.99,    43.65,    56.10, Sparsity :  81.42,  85.55
   ...
---
 Layer  (1) : Max PASS :    (2)   :    (3)   Out Q :     (5)  ,    (6)  , TIDL_xxxxLayer       , PASSED  #MMACs =   (7)   ,    (8)  ,    (9)  , Sparsity :  (10) ,  (11)


Best regards,
Saito