Hi, could you please provide a bit of clarification around the typical pulse duration and rise/fall time in Table 7-85. Switching Characteristics for McSPI Output Timings – Master Mode,
SLUSC35A –APRIL 2015–REVISED APRIL 2015?
We are using the SPI interface in master mode, OPP100 and struggle to produce a valid timing analysis for the setup time during read operations due to the variations in the clock period based on the load capacitance.
The clock period has a duty cycle of 45/55 for Low load and 40/60 for High load, but the rise and fall time don't change for different loads, can you please clarify why is this so?
Additionally the input capacitance of the AM3358 SPI SOMI has not been specified anywhere in the datasheet, am I correct assuming a max 8 pF input capacitance?
Thank you for your help.
