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Linux/AM4378: NAND boot fails

Part Number: AM4378

Tool/software: Linux

Team,

In a Custom board based on AM437x we have mounted MT29F4G08ABADAWP NAND flash and we are able to read write to NAND. But Booting from NAND is not working after POR. Followings are the boot priorities: UART0 -> NAND_I2C -> NAND -> MMC0. The sysyboot pins are: [4:0] = 11001b, [6] -> LOW [8] -> LOW [11] -> LOw [15:14] -> 10b (Using 25Mhz System Clock).

Followings are the NAND Configuration:

#define CONFIG_SYS_NAND_PAGE_SIZE        2048
#define CONFIG_SYS_NAND_OOBSIZE                128
#define CONFIG_SYS_NAND_BLOCK_SIZE        (128*1024)
#define CONFIG_SYS_NAND_PAGE_COUNT        (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME        OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS        NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS        { 2, 3, 4, 5, 6, 7, 8, 9, \
                                10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
                                20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
                                30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
                                40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
                                50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
                                60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
                                70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
                                80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
                                90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
                        100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
                        110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
                        120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
                        130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
                        140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
                        150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
                        160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
                        170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
                        180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
                        190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
                        200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
                        }
#define CONFIG_SYS_NAND_ECCSIZE                512
#define CONFIG_SYS_NAND_ECCBYTES        26


Best Regards,
Ravi
  • Per Figure 5-15 from the AM437x TRM Rev. H you will need to use BCH-16 for your ECC correction.
  • We tried this option but no success.

    attached the trace dump. Please help us analyze the trace dump.

  • Can you also post registers r0 - r15?

    Steve K.
  • PC	0x00034E28	Program Counter [Core]	
    SP	0x40338D2C	General Purpose Register 13 [Core]	
    LR	0x4033B860	General Purpose Register 14 [Core]	
    CPSR	0x800001F3	Stores the status of interrupt enables and critical processor status signals [Core]	
    R0	0x40338ED8	General Purpose Register 0 [Core]	
    R1	0x000003FE	General Purpose Register 1 [Core]	
    R2	0x00002D8A	General Purpose Register 2 [Core]	
    R3	0x00001999	General Purpose Register 3 [Core]	
    R4	0x00000000	General Purpose Register 4 [Core]	
    R5	0x44E09000	General Purpose Register 5 [Core]	
    R6	0x00000405	General Purpose Register 6 [Core]	
    R7	0x60000000	General Purpose Register 7 [Core]	
    R8	0x0003B4F0	General Purpose Register 8 [Core]	
    R9	0x00000000	General Purpose Register 9 [Core]	
    R10	0x00000004	General Purpose Register 10 [Core]	
    R11	0x48040000	General Purpose Register 11 [Core]	
    R12	0x48040000	General Purpose Register 12 [Core]	
    R13	0x40338D2C	General Purpose Register 13 [Core]	
    R14	0x4033B860	General Purpose Register 14 [Core]	
    
    Please find the register trace

  • "BCH16"

    1. spruhl7h.pdf (TRM) figure 5.15 saying that
    the BCH data is automatically calculated by the GPMC on reading each 512-byte sector. my question is what is the specific need to give ECC SCHEME.

    2. we updated ECC OPT as BCH16 in configuration file as well in DTS file.
    now we are facing "omap-elm: uncorrectable ECC errors"

    3. when we are using BCH8 in both the files, we are able to program the NAND locations.

    please suggest
  • Hi Biser/Steve, please confirm if only BCH16 is supported on the AM437x device. Also With BCH8 I see that its progressing until the SPL.

    Here is the out put:

    CCCCCCCC

    U-Boot SPL 2017.01-00458-gccd1c34-dirty (Jun 07 2018 - 20:00:40)

    SPL: Unsupported Boot Device!

    SPL: failed to boot from all boot devices

    ### ERROR ### Please RESET the board ###

    And register dumps:

  • I can explain the error message you are seeing from MLO. After the boot ROM loads MLO into internal RAM and executes it, register r0 is loaded with the address of a boot parameter structure. One field is a device ID of what you booted from. MLO then goes to look for u-boot.img on that media. If r0 is not pointing to a valid structure, the device ID field will be incorrect and you see that error message.

    Steve K.