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AM5728: Reset issue

user5032636
Prodigy 170 points
Part Number: AM5728

Re：AM5728 start up failed  after double-press reset t button countinuously

Hi,

We've made a custom board according to 5728 evm board，we have designed the cold reset button and warm reset button. The cold reset buttom is to reset PMIC to accomplish a POR reset and the warm reset buttom connect directly to PORn pin of AM5728。The schematic shown in the following picture. when I did the power-on-reset test，I found the 5728 can't boot (boot from eMMC) when I press the cold reset button twice  countinuously, about three minutes later, it boot automatically  and system start up successfully. And I try double press the warm reset button and the problem reappeared frequently.Then I test the GP_EVM board we bought and GP_EVM  also have the same problem.

When AM5728 fail to start up,I found the  DDR1/2_RESET pin were pulled down and three minute later the DDR1/2_RESET were released  so that the system reboot automatictly. I check the warm reset sequence  which shows at the following picture.It Seems the step4 meet problems so that the EMIF are unable to switch from IDLE to ACTIVE state. 

What do you think about this problem? I am in need of some help to make it clear for my project.

Thanks a lot for your help!!

Mandy 

w

  • 0
    TI__Guru**** 393215 points
    The factory team have been notified. They will respond here.
  • 0 in reply to Biser Gatchev-XID
    TI__Mastermind 46460 points

    Mandy,

    I do not agree with your terminology.  Your "cold reset" is a reset to the PMIC.  Your "warm reset" is a PORz reset to the AM5728 processor.  I believe they should operate as designed assuming that you understand the results of generating a PMIC reset or a processor PORz reset.

    AM5728 has a mandated power down sequence.  The PMIC can manage this required sequence.  However, during a power loss event, I do not see circuitry in your schematic to manage this.  You need to add a voltage supervisor circuit, such as a TPS3808-33, to monitor the input supply to the PMIC.  If the supply collapses or browns-out, the output of this circuit needs to drive PMIC RESET_IN low to force the power down sequence to commence.

    Why are you performing a "double-press" to the reset?  That is not a defined use case.  A single reset should be applied and then the unit will boot up.  Do you observe this?

    Tom

  • 0 in reply to Tom Johnson 16214
    Prodigy 170 points

    Tom

    my cold reset is to connected to the PMIC's reset_in pin which is a gating signal for on request and causes a switch-off event (Cold Reset or Shutdown)，I think  the cold reset is OK. my warm reset is connect to  PORz pin bacause I saw that  Reset Should Use PORz in the ERRTA  datashheet and I used the first  implementation to avoid the SOC hang during boot after the reset source is de-asserted. 

    I think the voltage supervior isn't  important on this problem because the input  supply of PMIC is always on.

    A single reset is OK ,Once I used 5 boards to do  the start-up test automatically by using a timing swith to control the board supply ON or OFF, I found some boards were hang while some were normal.So I did  pass off power  manually ,but I did not reappear the problem.Then I try to use the cold reset and warm reset,as a result, I found the problem,which lets me think of that does it have some connection to the SOC hang during my start-up test.

    Why it could  reboot after 3 minutes? It is so strange.

    thanks

  • 0 in reply to user5032636
    TI__Mastermind 46460 points

    Mandy,

    Implementation #1 is a valid solution to resolve the AM572x Warm Reset erratum.  This workaround is independent of your PORz implementation.  Note that Implementation #1 is the solution on the AM572x IDK EVM.  You can see how the resets are implemented on that EVM.

    You say your PMIC input supply is always on.  This is not truthful.  The input supply must be shut down occasionally.  The shut-down sequence to the processor must be met every time the supply is shut off.  A voltage supervisor or other circuit is required to manage this event.

    When you do a single-press reset on your board and on the EVM, do you observe the correct behavior?

    Tom

  • 0 in reply to Tom Johnson 16214
    TI__Mastermind 46460 points

    Mandy,

    Is there anything else needed on this thread?

    Tom