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DM644x Digital VPBE OSD0

BMillikan
Intellectual 870 points

I have some questions about the OSD0 part of the VPBE of the DM644x.  I have an image in RGB565 format in RAM that I am copying to the "/dev/fb/0" device and right now I believe it is defaulted to the OSD0 device of the VPBE.  The VPBE is setup to output RGB565 formatted data, which I believe converts the RGB565 data to YCbCr data (using ROM tables???).  Can anyone explain this to me?  What gets passed to the 20-bit YC bus?  If I'm using the VPBECLK, do I need the DCLK?  What clocks the data internally?  I assume that data is represented as 4:4:4 data internally and is then converted to 4:2:2 when passed to the YC bus?

  • 0
    Intellectual 870 points

    I'm having trouble with the colors too, I'm not sure when (or how) the color conversion takes place as stated in the data sheet from RGB565 to YCbCr. Does anyone understand how this happens and when/how this takes place?  Is there any way to turn it off and just pass the RGB 16-bit data over the YC bus?

  • 0
    TI__Mastermind 41665 points

    BMillikan said:
    Can anyone explain this to me?

    The VPBE on the DM644x has an OSD peripheral that handles the color space conversions and blending of the various video/osd windows in DDR that need to be displayed out of a single video interface with a particular color space, which means you can have multiple internal color spaces (typically RGB for the OSD and YCbCr for the video) that all get automatically converted into a single color space for display. The main resource for this sort of documentation is SPRUE37c which contains the functional description and register listings of the VPBE.

    BMillikan said:
    What gets passed to the 20-bit YC bus?

    What ends up on the digital video bus depends on how you have the VPBE configured; the display format is independent of the format in DDR. You can have the OSD windows configured to accept multiple input formats that will be converted to whatever format you have the VPBE/VENC set to (VMOD register VDMD field). For example if you wanted to display RGB565 data from DDR to your display you would configure an OSD window to RGB565 mode, and it would be displayed in whatever format the VPBE/VENC is set to.

    BMillikan said:
    If I'm using the VPBECLK, do I need the DCLK?  What clocks the data internally?

    The clocking on the VPBE is described in section 3.1.1 of SPRUE37. DCLK is an output clock for digital LCDs and would be generated either internally or through another external clock, in general you provide a clock to the VPBE and than configure the VPBE to output the clock as necessary for your display. The data will be clocked by whatever you are outputting from the VPBE, if using DCLK the digital output will be synchronized to the rising edge of DCLK.

    BMillikan said:
    I assume that data is represented as 4:4:4 data internally and is then converted to 4:2:2 when passed to the YC bus?

    I believe the conversion to 4:2:2 would happen before the blending step in the OSD as the most typical video input to the OSD would be YCbCr 4:2:2 anyway, but I am not certain. I am not sure how this would matter for a 4:2:2 output in your use case?

    BMillikan said:
    Does anyone understand how this happens and when/how this takes place?

    The conversion from RGB565 in an OSD window to YCbCr will happen as the data is fed into the OSD blending hardware (the windows should have a common color space before blending them together). The equation for the conversion is given in section 4.3.5 of SPRU37c.

    BMillikan said:
    Is there any way to turn it off and just pass the RGB 16-bit data over the YC bus?

    The VPBE was not really designed for this, but it is possible to have data fed through the VPBE without conversions, you would have to configure the OSD window and VPBE/VENC output to both be YCbCr such that it does not try to perform any color space conversions, it would end up treating your RGB data as YCbCr data.