Tool/software: Linux
Linux version: 4.9.69
What is the best way to set CM_CLKSEL_DPLL_PCIE_REF.DPLL_MULT and .DPLL_DIV?
I see that dra7xx-clocks.dtsi contains the node dpll_pcie_ref_ck@200 where compatible="ti,omap4-dpll-clock" however this node only contains the register offsets for control, idlest, mult-div1, and autoidle.
If I want to set DPLL_MULT and DPLL_DIV to 750 and (9+1), respectively, where is the correct place to do this?
At a higher level, I'm trying to implement in linux several of the register settings found in the am57xx SDK pcie write_loopback example PlatformPCIESS1PllConfig function.
