Compute proper error codes

This BCH algorithm is 32,20,2  32 bit message, 20 bit data , and the remaining 12 bits are BCH code. This yields 2 bit error correcting capability.

 My question was in regard to

TRM 11.1.5.14.3.2.2 Memory-Mapping of the BCH Codeword

BCH encoding considers a block of data to protect as a polynomial message M(x). In our standard case,

512 bytes of data (that is, 212 bits = 4096 bits) are seen as a polynomial of degree 212 - 1 = 4095, with

parameters ranging from M0 to M4095. For 512 bytes of data, 52 bits are required for 4-bit error

correction, and 104 bits are required for 8-bit error correction. The ECC is a remainder polynomial R(x) of

degree 103 (or 51, depending on the selected mode). The complete codeword C(x) is the concatenation of

M(x) and R(x) as shown in Table 11-6

This section talks about 104 bits are required for 8-bit error correction. Thus 4096 bit data + 104 Bit error code = 4200 bit message.

I am looking for the polynomial that created the this BCH algorithm 4200,104,8 not 32,20,2.

Comments.....

Hello Tom,

Here is the info for t=8 bch taken from the BCH IP Implementation:

BCH(8191,8087)

The first option is to use a BCH(8191,8087), with the following characteristics :

• M = 13

• n = (2^M)-1 = 8191 bits = 1023 bytes (+7 bits) per codeword

• t = 8 (errors corrected)

• n-k = M * t = 104 bits = 13 bytes of ECC

• k = 8191-104 = 8087 bits = 1010 bytes (+7 bits) per message

Compared to the second option below, this one will detect and correct twice as many errors (8 instead of 4) but also requires an ECC only twice as long (104 instead of 52 bits). However, the maximum message size is almost the same.

The message may actually be shorter than k: typically one NAND sector of 512 bytes < 1010 bytes, with potentially a few spare bytes added. As far as the BCH polynomials are concerned, a short message is equivalent to a message where the first bits (1010 - 512 = 498 bytes = 3984 bits) are all zero. Those bits are implicit in the polynomial division that yields the remainder ECC and the polynomial syndrome (see next chapter).

The selected degree-104 generator polynomial G8(x) is:

G8(x) = x^104 +

x^100+ x^98 + x^96 + x^95 + x^94 + x^93 + x^92 + x^91 + x^88 + x^84 + x^82 + x^79 +

x^78 + x^77 + x^70 + x^69 + x^68 + x^67 + x^65 + x^64 + x^59 + x^58 + x^52 + x^49 +

x^48 + x^47 + x^42 + x^41 + x^40 + x^38 + x^32 + x^31 + x^30 + x^26 + x^24 + x^23 +

x^22 + x^18 + x^15 + x^14 + x^13 + x^12 + x^11 + x^9 + x^8 + x^5 + x + 1

Which can also be described by 105 bits (degree 104 through 0 = 105 parameters)

0b100010101111110010001010011100000011110110000110000010011100001110100000111000101110001001111101100100011

Or in hexadecimal, for density: 0x115F914E07B0C138741C5C4FB23

For info, the degree-13 primitive polynomial of the generator is given below. That property is not used in the

current module implementation.

p(x) = x^13 + x^4 + x^3 + x + 1

Note that in actual algorithms, the leading (i.e. highest degree) factor, that is by definition always 1, is often implicit (i.e. not represented), and the work is done on 104-bit (13-byte) vectors.

G(x) can be factorized to 8 degree-13 polynomials, F0(x) to F7(x):

F0(x) = x^13 + x^4 + x^3 + x + 1

F1(x) = x^13 + x^9 + x^7 + x^5 + x^4 + x^3 + x^2 + x + 1

F2(x) = x^13 + x^9 + x^8 + x^7 + x^5 + x + 1

F3(x) = x^13 + x^10 + x^9 + x^7 + x^5 + x^4 + 1

F4(x) = x^13 + x^10 + x^9 + x^8 + x^6 + x^3 + x^2 + x + 1

F5(x) = x^13 + x^11 + x^8 + x^7 + x^4 + x + 1

F6(x) = x^13 + x^12 + x^6 + x^5 + x^4 + x^3 + 1

F7(x) = x^13 + x^12 + x^8 + x^7 + x^6 + x^5 + 1

Which can also be described by 14 bits each (also in hexadecimal for density) :

F0: 0b10000000011011 = 0x201B

F1: 0b10001010111111 = 0x22BF

F2: 0b10001110100011 = 0x23A3

F3: 0b10011010110001 = 0x26B1

F4: 0b10011101001111 = 0x274F

F5: 0b10100110010011 = 0x2993

F6: 0b11000001111001 = 0x3079

F7: 0b11000111100001 = 0x31E1

I want to create OOB on NAND flash using 8bit BCH. I use  degree-104 generator polynomial to get the parity check bits.

But the partiy check 104 bits is difference to Hardware 8b BCH ECC.

Could you tell me, after mode g(x) how to create the BCH ECC?  thanks

Hi. I have similar problem. I have a root polynomial 0x201B (p(x) = x^13 + x^4 + x^3 + x + 1), BCH source code from Linux kernel, and I need to generate ECC sums identical to GPMC module (I need to add nand flash spare area content to client's image for pre-programming the memory before soldering on assmbly line). What trick should I use? Some data rearrangement or...? Forward thanks for any effort.

Has no one answered this?  We're having a similar problem on the AM37x. 

What is actually put out in the BCH result registers?

Ian

I need to be able to reproduce the hardware BCH8 results as well, you would think there is an application note for this but I can't find it.

512bytes + 12 in OOB for the message; then 14 bytes (one them a padded 0xFF) for the parity bits.

I see some other linux code for OMAP devices where a constant polynomial is added to force 0xFF buffers to have 0xFF parity, is this a factor in the hardware?