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Compiler/TMS320C6657: ROM Bootloader issue at section with length unequal modulo 4 bytes

Part Number: TMS320C6657

Tool/software: TI C/C++ Compiler

Dear TI Support Team,

I am working with latest C66xx compiler 8.2.3 on my own C6657 board.

Normally the SPI boot works correctly. Now I will use LZSS compression for some selected sections. As result of LZSS compression the generated xxx.load section has a size not multiple of four bytes, in my case 0x00000072 bytes.

After running the hex6x tool I can see in the generated btbl file, that hex6x appends some padding bytes to get a data size multiple of 4 bytes. This is my LZSS compressed section for reference:

00 00 00 72  9B 53 98 80 00 2A FD 00 48 0A 25 0F 6F 6C 6C 65 6F 77 20 FF

2C 64 6C 72 68 74 DF 0A 00 20 73 69 FF 20 61 20 70 6D 69 73 74 20 65 6C

74 73 65 FF 72 74 73 20 67 6E FF 69 20 6F 74 20 65 FF 68 63 74 20 6B 63

FF 74 61 68 4E 49 42 20 6C 20 54 49 64 61 6F D7 03 0A B0 01 FF 68 74 60

61 73 20 65 61 20 65 6D 43 20 73 B7 0A 2E C9 01 00 27 CF 09 17 0F 00 00

00 00 F0 FF

You can see length = 0x00000072 and load = 0x9B539880. All data in the BE format. The last two bytes F0 FF forms the LZSS end marker and the both 00 00 before are the padding from hex6x tool.

If I run such section inside of RBL then the expected end of section is not FF F0, instead the RBL writes 00 00. 

I have taken a look in the RBL sources (gem.c file) and I find out that the function coreCopyData() has a different behavior in case of sections with padding. Look at line 112 and following:

    if ((CSR & C64X_REG_CSR_BIT_EN) != 0)  {

      /* Little endian. Put remaining bytes in the least significant value */
      if (rb >= 1)  {
        insert = (p_data[j] >> 8) & 0x00ff;
        value = (value & 0xffffff00) | insert;

      } 

      if (rb >= 2)  {
        insert = p_data[j] & 0x00ff;
        value = (value & 0xffff00ff) | (insert << 8);

      } 
      
      if (rb >= 3)  {
        insert = (p_data[j+1] >> 8) & 0x00ff;
        value = (value & 0xff00ffff) | (insert << 16);
      }

    } else  {

The same situation can occur for the .const section.

Do you have any workoraund to get the RBL working correct in case of sections with padding, or how I can avoid such padding for auto generated sections?

Kind regards

Sven

 

  • Hi Sven,

    I've notified the sw team. They will post their feedback directly here.
    Could you share which RTOS SDK are you using?

    Best Regards,
    Yordan
  • Hi Sven,

    I am familiar with LZSS compression however please find the boot table section explanation from below link,


    Thank you.

  • Hi Raja,

    the provided link approved that the output of Hex6x tool is correct. As a consequence, the processing in the RBL is faulty.

    In general here is no errata document for the RBL available to get clear information about issues.

    Please, would you confirm that the processing of sections with padding is wrong in the RBL.

    In my project I am using my own btbl2spi tool to convert the BTBL file to a SPI writable file. I have modified my btbl2spi tool to change the section length to modulo four size. With that hack I avoid sections with padding and it works.

    Kind regards
    Sven
  • Dear TI Support Team,

    as I wrote, in general here is no errata document for the RBL available to get clear information about issues.

    Please, would you confirm that the processing of sections with padding is wrong in the RBL.

    Kind regards

    Sven

  • Dear TI Support Team,

    sorry, I am waiting for your feedback. If YOUR documentations of RBL and the C66xx devices were complete, then my questions would not be necessary.

    Please, would you confirm that the processing of sections with padding is wrong in the RBL.

    Thanks and kind regards
    Sven
  • Hi Sven,

    Apologize for the delay.

    Can you please provide a binary padded with zeros to try this on the EVM to confirm ? (or) Please try the same on EVM if you have one.

    Thank you.
  • Dear Raja,

    I have try to make a simple test application to trigger the RBL issue. See attached ZIP file.

    For your info, the binary files test.fill_fail.bin and test.fill_ok.bin are generated by my own tool btbl2spi.exe, which I can not share here.

    The first variant test.fill_fail.bin has been generated without any changes from the btbl file of Hex6x tool. The second variant test.fill_ok.bin has been generated from the same btbl file, but the section length has been increased to get a section length of multiple of 4 bytes. In that case the copy of RBL is ok, because the issue is only for sections with padding. The _readme.txt file contains some expected outputs from the CCS debug console.

    The bin files are generated for the usage on my own hardware, where the DSP reference clock is 156.25 MHz, which is different to the EVM.

    I have use the following steps for the testing:

    • load the bin file via Ethernet Boot to RBL
    • connect the target by CCS and reload the symbols
    • set the global variable g_wait to zero
    • depended on the used bin file the results of test will be printed in the CCS debug console 

    Your feedback is welcome.

    Kind regards

    Sven

    test.fill.zip

  • Hi Raja,

    do you have try out my test application?

    Please, would you fill a SDOWP to track the issue or add any entry in the errata of C6657.

    After that we can close this thread.

    Thanks and kind regards
    Sven