Hello TI community,
I am trying to make use of TI IPC module (version 3.47.01) to communicate between A15 and DSP. On A15 a QNX 7.0 is running (I know, TI does not support QNX, but TI provides sources for IPC on QNX). Thus, my software based on the example ex41_forwardmsg for Linux.
At first, I compile the ipc sources for my QNX with the help of following command: <path_to_qnx>\qnx700\host\win64\x86_64\usr\bin\make.exe -f .\ipc-qnx.mak all
After a successful compiling, I added the binaries to my OS image so that I can call the ipc module on qnx. Further, I need a software for my slave core (DSP1) which has - apart from sources - a memory map file (config.bld) and a resource table (rsc_table.h - based on ex41_forwardmsg/dsp1/rsc_table.h). I compared my custom resource table with this one from http://processors.wiki.ti.com/index.php/IPC_Resource_customTable - but I don't know, whether I understand the rsc table correctly.
My config.bld looks like:
var SR_0 = {
name: "SR_0", space: "data", access: "RWX",
base: 0xBFC00000, len: 0x00100000,
comment: "SR#0 Memory (16 MB)"
};
Build.platformTable["ti.platforms.idkAM572X:dsp1"] = {
externalMemoryMap: [
[ "DSP1_CODE", {
name: "DSP1_CODE", space: "code", access: "RWX",
base: 0x90000000, len: 0x01000000,
comment: "DSP1 Program Memory"
}],
[ "DSP1_DATA", {
name: "DSP1_DATA", space: "data", access: "RW",
base: 0x91000000, len: 0x05000000,
comment: "DSP1 Data Memory"
}],
[ "DSP1_HEAP", {
name: "DSP1_HEAP", space: "data", access: "RW",
base: 0x96000000, len: 0x00300000,
comment: "DSP1 Heap Memory"
}],
[ "DSP1_TRACE", {
name: "DSP1_TRACE", space: "data", access: "RW",
base: 0x9700000, len: 0x00060000,
comment: "DSP1 Trace Memory"
}],
[ "EXC_DATA", {
name: "EXC_DATA", space: "data", access: "RW",
base: 0x97060000, len: 0x00010000,
comment: ""
}],
[ "PM_DATA", {
name: "PM_DATA", space: "data", access: "RW",
base: 0x97070000, len: 0x00020000,
comment: "Power Management"
}],
[ "SR_0", SR_0 ]
],
codeMemory: "DSP1_CODE",
dataMemory: "DSP1_DATA",
stackMemory: "DSP1_DATA",
l1DMode: "32k",
l1PMode: "32k",
l2Mode: "128k"
};
Regarding config.bld, I configure my resource table as follows (only a snippet):
#define DSP_MEM_TEXT 0x90000000
/* Co-locate alongside TILER region for easier flushing */
#define DSP_MEM_IOBUFS 0x8B000000
#define DSP_MEM_DATA 0x91000000
#define DSP_MEM_HEAP 0x96000000
#define DSP_MEM_IPC_DATA 0x99000000
#define DSP_MEM_IPC_VRING 0xA0000000
#define DSP_MEM_RPMSG_VRING0 0xA0000000
#define DSP_MEM_RPMSG_VRING1 0xA0004000
#define DSP_MEM_VRING_BUFS0 0xA0040000
#define DSP_MEM_VRING_BUFS1 0xA0080000
#define DSP_SR0_VIRT 0xBFC00000
#define DSP_SR0 0xBFC00000
#define DSP_MEM_IPC_VRING_SIZE SZ_1M
#define DSP_MEM_IPC_DATA_SIZE SZ_1M
#define DSP_MEM_TEXT_SIZE (SZ_1M * 16)
#define DSP_MEM_DATA_SIZE (SZ_1M * 80)
#define DSP_MEM_HEAP_SIZE (SZ_1M * 3)
#define DSP_MEM_IOBUFS_SIZE (SZ_1M * 90)
#define DSP_SR0_SIZE (SZ_1M * 1)
/*
* Assign fixed RAM addresses to facilitate a fixed MMU table.
*/
/* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */
#define PHYS_MEM_IPC_VRING 0x99000000
/* Need to be identical to that of IPU */
#define PHYS_MEM_IOBUFS 0xBA300000
...
/* rpmsg vdev entry */
{
TYPE_VDEV, VIRTIO_ID_RPMSG, 0,
RPMSG_DSP_C0_FEATURES, 0, 0, 0, 2, { 0, 0 },
/* no config data */
},
/* the two vrings */
{ DSP_MEM_RPMSG_VRING0, 4096, DSP_RPMSG_VQ0_SIZE, 1, 0 },
{ DSP_MEM_RPMSG_VRING1, 4096, DSP_RPMSG_VQ1_SIZE, 2, 0 },
{
TYPE_CARVEOUT,
DSP_MEM_TEXT, 0,
DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT",
},
{
TYPE_CARVEOUT,
DSP_MEM_DATA, 0,
DSP_MEM_DATA_SIZE, 0, 0, "DSP_MEM_DATA",
},
{
TYPE_CARVEOUT,
DSP_MEM_HEAP, 0,
DSP_MEM_HEAP_SIZE, 0, 0, "DSP_MEM_HEAP",
},
{
TYPE_CARVEOUT,
DSP_MEM_IPC_DATA, 0,
DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA",
},
{
TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp",
},
{
TYPE_DEVMEM,
DSP_MEM_IPC_VRING, PHYS_MEM_IPC_VRING,
DSP_MEM_IPC_VRING_SIZE, 0, 0, "DSP_MEM_IPC_VRING",
},
{
TYPE_DEVMEM,
DSP_MEM_IOBUFS, PHYS_MEM_IOBUFS,
DSP_MEM_IOBUFS_SIZE, 0, 0, "DSP_MEM_IOBUFS",
},
...
{
TYPE_DEVMEM,
DSP_PERIPHERAL_ISS, L3_PERIPHERAL_ISS,
SZ_256K, 0, 0, "DSP_PERIPHERAL_ISS",
},
{
TYPE_DEVMEM,
DSP_SR0_VIRT, DSP_SR0,
DSP_SR0_SIZE, 0, 0, "DSP_SR0",
},
In my DSP1.cfg file, I added following lines:
var SysMin = xdc.useModule('ti.trace.SysMin');
Program.sectMap[".tracebuf"] = "DSP1_TRACE";
Program.sectMap[".errorbuf"] = "EXC_DATA";
/* Override the default resource table with my own */
var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
Resource.customTable = true;
Resource.loadSegment = "DSP1_CODE";
xdc.useModule('ti.sysbios.heaps.HeapBuf');
xdc.useModule('ti.sysbios.knl.Task');
xdc.global.SR0_cacheEnable = false;
xdc.global.procName = "DSP1";
var ipc_cfg = xdc.loadCapsule("../shared/ipc.cfg.xs");
xdc.useModule('ti.ipc.ipcmgr.IpcMgr');
/* Setup MessageQ transport */
var VirtioSetup = xdc.useModule('ti.ipc.transports.TransportRpmsgSetup');
/* Setup NameServer remote proxy */
var NsRemote = xdc.useModule("ti.ipc.namesrv.NameServerRemoteRpmsg");
BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');
BIOS.addUserStartupFunction('&IpcMgr_callIpcStart');
Before reporting my error log, I have the same problem with downloading my slave core app to IFS as described here: https://e2e.ti.com/support/arm/sitara_arm/f/791/t/555459?AM572x-IPC-3-43-02-04-on-QNX-SDP-7-0-Beta. Have someone solved this problem?
Now, I can start ipc on QNX as follows:
ipc DSP1 /tmp/dsp1_app.out
I get the following print:
Starting IPC resource manager...
RscTable_process: RscTable version is [1]
RscTable_process: vring [256] @ [0xa0000000]
RscTable_process: vring [256] @ [0xa0004000]
RscTable_process: carveout [DSP_MEM_TEXT] @ da [0x90000000] pa [0x81000000] len [0x1000000]
RscTable_process: carveout [DSP_MEM_DATA] @ da [0x91000000] pa [0x82000000] len [0x5000000]
RscTable_process: carveout [DSP_MEM_HEAP] @ da [0x96000000] pa [0xfe700000] len [0x300000]
RscTable_process: carveout [DSP_MEM_IPC_DATA] @ da [0x9f000000] pa [0xfea00000] len [0x100000]
RscTable_process: trace [trace:dsp] @ da [0x09700000] len [0x8000]
RscTable_process: devmem [DSP_MEM_IPC_VRING] @ da [0xa0000000] pa [0xfe600000] len [0x100000]
RscTable_process: devmem [DSP_MEM_IOBUFS] @ da [0x8b000000] pa [0xba300000] len [0x5a00000]
RscTable_process: devmem [DSP_TILER_MODE_0_1] @ da [0x60000000] pa [0x60000000] len [0x10000000]
RscTable_process: devmem [DSP_TILER_MODE_2] @ da [0x70000000] pa [0x70000000] len [0x8000000]
RscTable_process: devmem [DSP_TILER_MODE_3] @ da [0x78000000] pa [0x78000000] len [0x8000000]
RscTable_process: devmem [DSP_PERIPHERAL_L4CFG] @ da [0x4a000000] pa [0x4a000000] len [0x1000000]
RscTable_process: devmem [DSP_PERIPHERAL_L4PER1] @ da [0x48000000] pa [0x48000000] len [0x200000]
RscTable_process: devmem [DSP_PERIPHERAL_L4PER2] @ da [0x48400000] pa [0x48400000] len [0x400000]
RscTable_process: devmem [DSP_PERIPHERAL_L4PER3] @ da [0x48800000] pa [0x48800000] len [0x800000]
RscTable_process: devmem [DSP_PERIPHERAL_L4EMU] @ da [0x54000000] pa [0x54000000] len [0x1000000]
RscTable_process: devmem [DSP_PERIPHERAL_DMM] @ da [0x4e000000] pa [0x4e000000] len [0x100000]
RscTable_process: devmem [Ø] @ da [0x00000013] pa [0x00000000] len [0x0]
RscTable_process: devmem [Ø] @ da [0x00000013] pa [0x00000000] len [0x0]
Programming Dsp memory regions
=========================================
VA = [0x800000] of size [0x40000] at PA = [0x40800000]
VA = [0xe00000] of size [0x8000] at PA = [0x40e00000]
VA = [0xf00000] of size [0x8000] at PA = [0x40f00000]
VA = [0x90000000] of size [0x1000000] at PA = [0x81000000]
VA = [0x91000000] of size [0x5000000] at PA = [0x82000000]
VA = [0x96000000] of size [0x300000] at PA = [0xfe700000]
VA = [0x9f000000] of size [0x100000] at PA = [0xfea00000]
VA = [0xa0000000] of size [0x100000] at PA = [0xfe600000]
VA = [0x8b000000] of size [0x5a00000] at PA = [0xba300000]
VA = [0x60000000] of size [0x10000000] at PA = [0x60000000]
VA = [0x70000000] of size [0x8000000] at PA = [0x70000000]
VA = [0x78000000] of size [0x8000000] at PA = [0x78000000]
VA = [0x4a000000] of size [0x1000000] at PA = [0x4a000000]
VA = [0x48000000] of size [0x200000] at PA = [0x48000000]
VA = [0x48400000] of size [0x400000] at PA = [0x48400000]
VA = [0x48800000] of size [0x800000] at PA = [0x48800000]
VA = [0x54000000] of size [0x1000000] at PA = [0x54000000]
VA = [0x4e000000] of size [0x100000] at PA = [0x4e000000]
And in sys2log, I noticed the following MMU fault:
Jan 01 01:32:05.498 ipc.311315 slog* 0 DSP clock enabled:DSP_CLKSTCTRL = 0x102
Jan 01 01:32:05.498 ipc.311315 slog 0 DSP:RST2 released!
Jan 01 01:32:05.498 ipc.311315 slog 0 DSP:SYS_MMU_CONFIG MMU0 and MMU1 enabled!
Jan 01 01:32:05.640 ipc.311315 slog 0 *** benelli_mmu_init: phys_addr is invalid
Error [0x0] at Line no: 821 in file C:/ti/ipc_3_47_01_00/qnx/src/ipc3x_dev/ti/syslink/build/Qnx/resmgr/../../../../../ti/syslink/family/vayu/vayudsp/VAYUDspEnabler.c
Jan 01 01:32:05.640 ipc.311315 slog 0 De-assert DSP RST1
Jan 01 01:32:05.640 ipc.311315 slog 0 DSP:RST1 released!
Jan 01 01:32:05.640 ipc.311315 slog 0 ****************** DSP-MMU0 Fault ******************
Jan 01 01:32:05.640 ipc.311315 slog 0 runSlave successful for core 4
Jan 01 01:32:05.640 ipc.311315 slog 0 **** addr: 0x90033c00
Jan 01 01:32:05.640 ipc.311315 slog 0 **** TRANSLATIONFAULT
Jan 01 01:32:05.640 ipc.311315 slog 0 **************************************************
Jan 01 01:32:05.640 ipc.311315 slog 0 ipc_error_cb: Received Error Callback for DSP1 : MMU Fault
Jan 01 01:32:05.640 ipc.311315 slog 0 ipc_error_cb: Scheduling recovery...
Jan 01 01:32:05.640 ipc.311315 slog 0 stopping DSP1
Jan 01 01:32:05.641 ipc.311315 slog 0 Assertion at Line no: 832 in C:/ti/ipc_3_47_01_00/qnx/src/ipc3x_dev/ti/syslink/build/Qnx/resmgr/../../../../../ti/syslink/procMgr/hlos/knl/Processor.c: (size != 0) : failed
Regarding map file of DSP app, section .vecs is stored at address 0x90033C00.
Does someone can help me to solve my problem and maybe to answer the following questions:
- How can I interpret the following line of ipc output: carveout [DSP_MEM_TEXT] @ da [0x90000000] pa [0x81000000] len [0x1000000]?
My dsp text section is stored at 0x90000000 (virtual) and physically at 81000000? - How do config.bld and resource table correlate with each other?
- Which #defines in rsc table are important and application specific (virtual or physical), respectively?
What about:- PHYS_MEM_IPC_VRING:
- PHYS_MEM_IOBUFS / DSP_MEM_IOBUFS
- DSP_MEM_IPC_DATA
- DSP_MEM_TEXT
- Which #define (memory address) in rsc table has to be identical with memory mapping in qnx?
- (qnx specific - maybe any TIer knows something about this ;-)): memory mapping in qnx is done with an "-r<addr>,<size>" argument, right? Which address and size has to be set here? Only for the shared memory region?
My current setting is: -r0x99000000,0x0F000000 (belonging to value of #PHYS_MEM_IPC_VRING)
Thanks a lot for your help.
Best regards
Thomas
