Part Number: AM3354
Other Parts Discussed in Thread: DP83640,
Hello all,
I'm using the AM3354 processor in a project with QNX 6.5SP1. My project is based on a SoM which is very much like the AM335x Sitara SDK and I'm using the QNX 6.5 BSP for said hardware albeit some changes I've been making to accomodate my needs. I'm also using the DP83640 PHY which I use in 100Base-FX full-duplex mode.
I was reading through the source code of the network driver and there's a mii callback function implemented, which basically interrogates the ethernet PHY through the MDIO to know the mode of operation after auto-negotiation, and then proceeds to configure the MACCONTROL register according to what was read from the PHY.
One of the bits they change is the IFCTL_A (they set it if the media rate is 100Mbps, and its cleared if not). I read the technical reference manual of the AM335x family of processors, but didn't find much information about it aside the bit description in Table 14-189. It reads:
IFCTL_A R/W 0h
Connects to the speed_in input of the respective RMII gasket.
When using RMII mode:
0 - 10Mbps operation
1 - 100Mbps operation
What does this mean? Does it change anything if we are not working in RMII mode? We use GMII. There's no mention of a "speed_in input" or "RMII gasket" in the manual.
Any help will be much appreciated.
Regards and thanks!
