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RTOS/TDA2PXEVM: No clock on CSI lines

Part Number: TDA2PXEVM
Other Parts Discussed in Thread: DS90UB960-Q1, DS90UB953-Q1

Tool/software: TI-RTOS

Hi,

I'm using custom made board with TDA2PX chip. I have DS90UB960-Q1 Deserializer and DS90UB953-Q1 Serializer. I'm trying to configure serializer in pattern mode and I'm able to get some signal on all 4 CSI data lanes on deserializer, but when I check CLK_P and CLK_N pins with oscilloscope there is nothing. Any idea how is this possible and how to fix that?

Best regards.

  • Hi Stefan,

    Can you ensure that CSI2 clock is programmed correctly, also have you validated the UB960 configurations?

    Regards,
    Sujith
  • Hi,

    I'm using deserializer configuration from file iss_sensor_imx390.c. How I can check CSI2 clock?

    Regards,

    Stefan.

  • Stefan,

    I would suggest first enabling internal color bar in UB960 and check if it is getting captured correctly.
    We need to set below registers to enable color bar in UB960. Here in each entry, the first value is register offset, second is register value and third is just delay in ms. Could you please try with this first?
    Please note that this config assumes back channel frequency to be 50Mbps.

    {0xB0, 0x00, 0x10}, // Indirect Pattern Gen Registers
    {0xB1, 0x01, 0x10}, // PGEN_CTL
    {0xB2, 0x01, 0x10}, //
    {0xB1, 0x02, 0x10}, // PGEN_CFG
    {0xB2, 0x33, 0x10}, //
    {0xB1, 0x03, 0x10}, // PGEN_CSI_DI
    {0xB2, 0x2C, 0x10}, //

    {0xB1, 0x04, 0x10}, // PGEN_LINE_SIZE1 2880 bytes
    {0xB2, 0x0b, 0x10}, //
    {0xB1, 0x05, 0x10}, // PGEN_LINE_SIZE0
    {0xB2, 0x40, 0x10}, //

    {0xB1, 0x06, 0x10}, // PGEN_BAR_SIZE1 360
    {0xB2, 0x01, 0x10}, //
    {0xB1, 032x07, 0x10}, // PGEN_BAR_SIZE0
    {0xB2, 0x68, 0x10}, //

    {0xB1, 0x08, 0x10}, // PGEN_ACT_LPF1 1080
    {0xB2, 0x04, 0x10}, //
    {0xB1, 0x09, 0x10}, // PGEN_ACT_LPF0
    {0xB2, 0x38, 0x10}, //

    {0xB1, 0x0A, 0x10}, // PGEN_TOT_LPF1 1200
    {0xB2, 0x04, 0x10}, //
    {0xB1, 0x0B, 0x10}, // PGEN_TOT_LPF0
    {0xB2, 0xB0, 0x10}, //

    {0xB1, 0x0C, 0x10}, // PGEN_LINE_PD1 27.7us
    {0xB2, 0x0A, 0x10}, // 06
    {0xB1, 0x0D, 0x10}, // PGEN_LINE_PD0
    {0xB2, 0xD8, 0x10}, // 33
    {0xB1, 0x0E, 0x10}, // PGEN_VBP
    {0xB2, 0x21, 0x10}, //
    {0xB1, 0x0F, 0x10}, // PGEN_VF
    {0xB2, 0x0A, 0x10}, //

    Rgds,
    Brijesh
  • Hi Brijesh,

    Now I'm able to see all signals on oscilloscope (clk + data), but there are no frames on ISS capture link. My question is: why I'm unable to read some CSI2 registers, for example CAL_CSI2_STATUS_0 (0x4221 3350). I can't access to that register. I was able to receive pattern image with same usecase and same I2C configuration on TDA3x and UB954 deserializer.

    Regards,

    Stefan.

  • Hi Stefan,

    From which core are you trying to read these registers? If it is from IPU, you need to use 0x62213350 offset.
    So i2c goes through, signal are toggling, but there is no data. can you check if the ub960 is configured in continuous clock mode?
    Also check if the reset done bit is set or not??
    Btw, which VSDK version that you are using?

    Rgds,
    Brijesh
  • Hi,

    I managed to capture image. Problem was different order of differential signals for CSI2 port. It was opposite on our board. Thanks on your help. Also, I managed to get video from IMX390 sensor (I sent you some questions about this problem on mail) but there are some problems with framerate and image quality. I will close this thread and post new question on forum.

    Best regards,
    Stefan.
  • Hi,

    If you can help me with this related issue.

    https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/701237



    Regards.