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DM648 Videoport maximum speed

Victor Ivanov
Expert 1160 points

Other Parts Discussed in Thread: TMS320DM648

Hi all!

I have DM648 Evaluation Module and I'm working with Videoprot 2 which is connected to my prototype board.  My data are not standart video data so I configured Videoport to use Raw Data Capture Mode. I use Noncontinuous frame capture mode now and I generate only one CAPEN by my board.

I started experiments with VCLK about 65MHz and data length was 1024 samples. Everything was OK. Then I increased length up to 8192 samples (maximum length which I have to support) and I got Capture Overrun Interrupt. As I understand it means that EDMA3 takes data from Videoport slower than Videoport takes them from the board.

Then I started to decrease VCLK and with VCLK=10MHz everything was OK again. I use 2 bytes for sample so the speed seems to be about 20 Mb per second.

To check the value of speed I made another one experiment. I set the length of data equal 1024 samples and used only one event to copy data from Videoport FIFO to memory. I think, in this case the time between Capture Complete (in Videoport) and Transfer Complete (In EDMA) is a time of copying data from Videoport to DDR2. In Capture complete interrupt handler I set one of free GPIO as 1 and in in Transfer complete interrupt handler I set it as 0. Using oscilloscope I found out that the time was about 100 micro seconds per 1024*2 bytes so the speed was again about 20 Mb per second.

Is 20 Mb/s is a limit speed of data capturing for Videoport or there must be an error somewhere in my settings.

 

Thanks in advance and sorry for so long explanation.

Victor

  • 0
    Expert 1575 points

    Hi Victor,

    the videoport should take data at up to 80MHz (160MB/sec). What I wonder is where you store your data. 100us seems to be very long for 2048 Bytes... Maybe the destination memory of the EDMA transfers is limiting your speed. Do you copy using 64 Bit transfers (as Videoport requires)? Is the destination memory capable of that?

    Another thing I was thinking: the FIFO length is about the size of your data. How big did you configure the size of data that is required to trigger an EDMA event? If it is too close to the FIFO length new data might overwrite old one before EDMA is able to copy the old one (which triggers the capture overrun ISR). I have a similar application and I dont set the data size between EDMA events to more than half the FIFO size.

    bye,

    Thomas

     

  • 0
    TI__Expert 4935 points

    Victor,

     

    When you increase the width of the video make sure that you accordingly change the threshold value programmed in the VPORT and the EDMA parameters.

    In order to avoid over run errors, make sure that this threshold value is around 100 double words and is a multiple of the actual line width.

     

    In your case of 8192 samples per line, program the VPORT threshold as 128 double words. Hence the EDMA parameters will be

    A count = 8 bytes (64 bits) with EDMA in FIFO mode

    B count = 128 double words

    C count = 8192/(128 * 8) = 8

     

    Hope this helps you!!

     

    Regards,

    Sivaraj R

  • 0 in reply to Sivaraj R3681
    Expert 1160 points

    Hi Sivaraj,

    Thanks for your suggestion !

    I tryed your combination of parameters (but I think C count should be 8192 * 2 / (128 * 8) = 16 because I use 16 bits samples), however it didn't help. On the contrary, with this parameters I need to use a little lower VCLK to avoid Capture Overrun.

    Originally I used the fillowing parameters:

    VPORT threshold

    VC_THRLD=256   -   256 * 8 = 2048 bytes (slightly less then 1/2 of the Videoport FIFO)

    EDMA PaRAM

    OPT = 0x00100301  -  TCINTEN = 1, FWID = 64 bits, SAM = 1, A synchronized transfer
    SRC = (Uint32)&(VP2ChannelARegs->YSRCA)
    A_B_CNT = ( 8 << 16 ) | ( 256 * 8 )     -   ACNT = 8, BCNT = 2048 bytes
    DST=(Uint32)&Dst
    SRC_DST_BIDX = ( 256 * 8 ) << 16     -   SRCBIDX = 2048
    LINK_BCNTRLD = 0x0000FFFF
    SRC_DST_CIDX = 0
    CCNT = 0x00000001

     

    I'm not completely sure that I set OPT (SAM and FWID) parameter right, but it works fine up to VCLK  = 10MHz. Could you please explain me these parameters a little.

     

    Victor

  • 0 in reply to Thomas9070
    Expert 1160 points

    Hi Thomas,

    thank you a lot for the fast answer. I'm very glad to here that VPORT has to work faster then I can see now because it is important for our device.

    In my experiments I use 2048 bytes as a size which should trigger an EDMA event. It is slightly less than 1/2 of VPORT's FIFO.

    Originally I used DDR2 ( which is installed on my TMS320DM648 DVDP) as a destination of transferring. Today I tried the same experiments using only IRAM and the result is the same.

    Then I tried to copy 2048 bytes from one place in IRAM to another place in IRAM using EDMA and the result was 50 us. I'm really surprised with the result.

    I use GPIO in our device and I also was surprised that the minimum time of switching GPIO from 0 to 1 or vice versa is about 1 us and it is also seems to be quite a big time.

    I tried some simple calculation in a loop and it also took more time that I expected.

    So, it seems that everything works quite slowly. :-)

    What could be the reason of the slowness.  It is the first time I work with TI equipment so it is quite possible I did something wrong.

     

    Thanks for your help!

    Victor

  • 0 in reply to Victor Ivanov
    Expert 1575 points

    Hi Victor,

    just a guess... I once had really bad performance on the DM648 when I had the PLL setup incorrectly. After using the DM642, I was not used to setup the clock multiplicator in software. Are you sure that your DM648 runs at full speed? I cannot believe that 2048Bytes takes 50us to copy in internal memory... This would be only about 10M Transfers / sec for 32Bit transfers...

    an example of the pll configuration can be found in
    pspdrivers_1_10_00_09\packages\ti\sdo\pspdrivers\soc\dm648\examples\pllc\src\pllc_example.c

    Documentation is available in the DSP Subsystem manual sprueu6 and DM648 manual sprs372

    also check this post...

    bye,

    Thomas

  • 0 in reply to Victor Ivanov
    TI__Expert 4935 points

    Victor,

    A Slight modification in my previous reply in configuring the EDMA parameters:

    ACNT = (the threshold value in bytes set in VPORT)

    BCNT = (line size in bytes)/ACNT - This is used when threshold is less than line size.

    CCNT = Number of lines in a frame.

     

    As suggested by Thomas, the performance figure seems to be very low.

    The DM648 VPORT can easily capture 1080i @ 30 FPS without any issue. This comes around 124 MB/Sec.

    So kindly check other external parameters like clock, DDR configuration etc...

     

  • 0 in reply to Sivaraj R3681
    Expert 1160 points

    Thomas,

    you are absolutely right!

    The PLL was not properly configured. It seems that DSP Speed parameter in Configuration.tcf has no effect.  After I had configured the PLL in my program, everything started working much faster. I don't have any problems with Videoport anymore.

     

    Thomas, Sivaraj R, thank you very much for your help and fast responses!

    Best Regards

    Victor

  • 0 in reply to Victor Ivanov
    TI__Mastermind 18130 points

    Thomas,

    Thanks for pointing out the PLL suggestion. That seems to have done the trick nicely :)

    Victor Ivanov said:
    The PLL was not properly configured. It seems that DSP Speed parameter in Configuration.tcf has no effect.  After I had configured the PLL in my program, everything started working much faster. I don't have any problems with Videoport anymore.
    (emphasis mine) This is spot-on. The speed parameter inside the configuration file is used to tell BIOS how to configure its own timing mechanisms. The 'heart-beat' or the scheduler is a Timer set to a 1ms periodic interrupt, so it has to know at what speed the CPU is to properly configure everything.

  • 0 in reply to TimHarron
    Expert 1160 points

    Tim,

    Thanks a lot for clarification. I didn't understand the meaning of this parameter before.

    Victor