RTOS/PROCESSOR-SDK-AM437X: Ethernet PHY not found

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zhuangbin,

Do you have a PHY connecting to the 2nd port? Are you able to get one port working even with the message "ENETPHY_FindingState: Timed Out looking for a Phy!" ?

By default, the PHY address on AM437x IDK is configured to 0 and 1 in emac_soc.c EMAC_HwAttrs_V4 EMACInitCfg[1] =

{
{
SOC_IPORT_REG,
SOC_ISL1_REG,
0U,
},
{
SOC_IPORT_REG,
SOC_ISL2_REG,
1U,
}
}

Does it match your board?

Regards,
Garrett

Hi,

Thank you first.

I have not the second port.

should I delete the item:

{
SOC_IPORT_REG,
SOC_ISL2_REG,
1U,
}

Hi zhuangbin,

Which RGMII interface (RGMII1 or RGMII2) is not presented on your board? Don't delete the port entry. If you don't have a PHY connecting to the RGMII2 interface, the RGMII1 should still works even through the '"ENETPHY_FindingState: Timed Out looking for a Phy!" from RGMII2.

And which processor SDK release you are working with?

Regards,
Garrett

pdk_am437x_1_0_4.
I have just only one port ，RGMII1. I'm not sure if it came up because of loss of RGMII2. It prompts "ENETPHY_FindingState: Timed Out looking for a Phy!" Ceaselessly after powered on. How do I confirm the port 1 work correctly?

Zhuangbin,

Please upgrade to pdk_am437x_1_0_10 from the latest Processor SDK 4.3 (software-dl.ti.com/.../index_FDS.html)

Make sure the pinmux/phy in board library aligns with your custom board.

Regards,
Garrett

If it mast to be updated to the newest one, I'll try it.But I'm not sure if it's valid.

and I am  confirmingthe pinmux.

thanks.

I had updated the development platform, CCSv7+pdk_am437x_1_0_10, and had check the pinmux configure, it is correct.

but the problem remains.

what happen?

and I find thhougt all of the source codes, I can not find where call the function MDIOInit () in C:\ti\pdk_am437x_1_0_10\packages\ti\starterware\dal\mdio.c.It's strange, I think that if the mdio port is not inited before, how can we operate the MAC port.

what's wrong with me?

zhuangbin,

MDIO is initialized by ENETPHY_Init() function during EMAC_cpgmacMacOpen(). The ENETPHY_Init() is implemented in enet_phy.c (within board library).

CSL_MDIO_setClkDivVal((CSL_mdioHandle) ((ENETPHY_DEVICE *) hPhyDev)->miibase, (MdioBusFreq/MdioClockFreq - 1));
CSL_MDIO_enableFaultDetect((CSL_mdioHandle) ((ENETPHY_DEVICE *) hPhyDev)->miibase);
CSL_MDIO_disablePreamble((CSL_mdioHandle) ((ENETPHY_DEVICE *) hPhyDev)->miibase);
CSL_MDIO_enableStateMachine((CSL_mdioHandle) ((ENETPHY_DEVICE *) hPhyDev)->miibase);

Do you use the same PHY KSZ9031RN on your board as IDK AM437x?

Regards,
Garrett

OK! I found it.

In my board, it is a AR8035  on the RGMII1, and a KSZ9031 on the RGMII2.

Is there a problem with different models?

How can I drive the RGMII2 regardless of RGMII1?

zhuangbin,

It's possible there is gap between the default PHY configuration for KSZ9031 in the board library and AR8035 RGMII1 on your board. To driver the RGMII2, you may refer to nimu_dual_mac_idk.cfg in pdk_am437x_1_0_10\packages\ti\transport\ndk\nimu\example\am572x\armv7\bios and main_AM57xx in ti\transport\ndk\nimu\example\src for NIMUDeviceTable update.

Regards,
Garrett

zhuangbin,

For PHY address configuration, see my response at Jun 26, 2018 4:42 PM above.

-Garrett

OK!,I can not find your response at Jun 26,2018 4:42 PM above. I guess that you mean this:

By default, the PHY address on AM437x IDK is configured to 0 and 1 in emac_soc.c EMAC_HwAttrs_V4 EMACInitCfg[1] =

{
{
SOC_IPORT_REG,
SOC_ISL1_REG,
0U,
},
{
SOC_IPORT_REG,
SOC_ISL2_REG,
1U,
}
}

is the 0U/1U the PHY address?